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Wed, 11 Nov 2026 16:01:09 -0800 (PST) Received: from localhost ([151.40.161.170]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-498365cbeedsm13418776f8f.43.2026.11.11.16.01.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 Nov 2026 16:01:08 -0800 (PST) X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Thu, 12 Nov 2026 01:01:07 +0100 Message-Id: To: "Brian Masney" , "Ettore Chimenti" Cc: "Tero Kristo" , "Stephen Boyd" , "Brian Masney" , "Jerome Brunet" , "Tony Lindgren" , "Michael Turquette" , "Andrew Goodbody" , "Rouven Czerwinski" , , , Subject: Re: [PATCH v2 4/4] clk-816x: add sys_ck clock as sys_clkin_ck alias From: "Ettore Chimenti" X-Mailer: aerc 0.22.0-0-gc2f86b7abde3 References: <20261028-patch-ektor5-dm8168-clk-v2-0-dc6bf0fabae4@linaro.org> <20261028-patch-ektor5-dm8168-clk-v2-4-dc6bf0fabae4@linaro.org> <179442321741.1131744.1980930320808367339.b4-reply@b4> In-Reply-To: <179442321741.1131744.1980930320808367339.b4-reply@b4> Hi Brian, On Wed Nov 11, 2026 at 7:53 PM CET, Brian Masney wrote: > Hi Ettore, > > On 2026-10-30 11:48:58+01:00, Ettore Chimenti wrote: >> On Wed Oct 28, 2026 at 4:53 PM CET, Ettore Chimenti wrote: >>=20 >> > This patch adds a new clock alias for the DM816x system, mapping >> > 'sys_ck' to 'sys_clkin_ck'. This change is necessary because the volta= ge >> > management driver searches for 'sys_ck' in these systems and fails >> > without this alias. By including 'sys_ck' as an alias for >> > 'sys_clkin_ck', we ensure compatibility with existing drivers that may >> > reference 'sys_ck'. >> > >> > Tested-by: Andrew Goodbody >> > Signed-off-by: Ettore Chimenti >> > --- >> > drivers/clk/ti/clk-816x.c | 1 + >> > 1 file changed, 1 insertion(+) >> > >> > diff --git a/drivers/clk/ti/clk-816x.c b/drivers/clk/ti/clk-816x.c >> > index 3b8e483aec92..fe6f66fc5a05 100644 >> > --- a/drivers/clk/ti/clk-816x.c >> > +++ b/drivers/clk/ti/clk-816x.c >> > @@ -57,6 +57,7 @@ static struct ti_dt_clk dm816x_clks[] =3D { >> > DT_CLK(NULL, "timer_sys_ck", "sys_clkin_ck"), >> > DT_CLK(NULL, "timer_32k_ck", "sysclk18_ck"), >> > DT_CLK(NULL, "timer_ext_ck", "tclkin_ck"), >> > + DT_CLK(NULL, "sys_ck", "sys_clkin_ck"), >> > { .node_name =3D NULL }, >> > }; >>=20 >> I'll drop this patch from the series. The proposed approach from Sashiko >> seems sound and I just sent a separate patch that implements that. > > Will there be a follow up to this series for the clk subsystem? I don't > see any. I haven't gone through the other patches in this series. Or are > just the first 3 patches here what needs to be reviewed / possibly > merged? Actually, I was waiting for reviews on the other patches before sending a v3 to collect R-b's.=20 However, this patch (4/4) can be skipped reviewing. It will be dropped as I've already sent [1] (it belongs to another subsystem, so you might have missed it). [1]: https://lore.kernel.org/all/20261030-patch-ektor5-dm81xx-vd-v1-1-8ba90= 608c25b@linaro.org/ > > Brian Thanks, Ettore