Re: [PATCH v1 29/45] clk: mediatek: mt7986-apmixed: Use PLL_AO flag to set critical clock

AngeloGioacchino Del Regno
2023-02-07T15:22:56Z

Il 07/02/23 15:43, Daniel Golle ha scritto:
>
> On Mon, Feb 06, 2023 at 04:29:12PM +0100, AngeloGioacchino Del Regno wrote:
>> Instead of calling clk_prepare_enable() at probe time, add the PLL_AO
>> flag to CLK_APMIXED_ARMPLL clock: this will set CLK_IS_CRITICAL.
>
> I've been preparing a similar change, but also splitting-off the
> apmixed part from dt headers into a file of its own, so that one of now
> identical drivers for MT7986 and MT7981 can be removed in favor of a
> shared driver.
> Should I propose this on top of this series or can you make this change?
>
>

That's cool!!! I'm not comfortable in stealing the idea, that's all yours.
Please go on with basing it on top of my series, but wait a couple of days
before doing that, as I have to send a v2 of this one and that'll happen
in the next one..or two days.

Cheers!
Angelo

>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>> drivers/clk/mediatek/clk-mt7986-apmixed.c | 4 +---
>> 1 file changed, 1 insertion(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/mediatek/clk-mt7986-apmixed.c b/drivers/clk/mediatek/clk-mt7986-apmixed.c
>> index 62080ee4dbe3..227ca572056e 100644
>> --- a/drivers/clk/mediatek/clk-mt7986-apmixed.c
>> +++ b/drivers/clk/mediatek/clk-mt7986-apmixed.c
>> @@ -42,7 +42,7 @@
>> "clkxtal")
>>
>> static const struct mtk_pll_data plls[] = {
>> - PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, 0, 32,
>> + PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, PLL_AO, 32,
>> 0x0200, 4, 0, 0x0204, 0),
>> PLL(CLK_APMIXED_NET2PLL, "net2pll", 0x0210, 0x021C, 0x0, 0, 32,
>> 0x0210, 4, 0, 0x0214, 0),
>> @@ -77,8 +77,6 @@ static int clk_mt7986_apmixed_probe(struct platform_device *pdev)
>>
>> mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
>>
>> - clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk);
>> -
>> r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
>> if (r) {
>> pr_err("%s(): could not register clock provider: %d\n",
>> --
>> 2.39.1
>>
>>