Re: [PATCH v2 2/6] clk: sifive: Use reset-simple in prci driver for PCIe driver

Palmer Dabbelt
2021-03-31T00:25:38Z

On Mon, 29 Mar 2021 20:36:12 PDT (-0700), greentime.hu@sifive.com wrote:
> Stephen Boyd <sboyd@kernel.org> 於 2021年3月30日 週二 上午3:14寫道：
>>
>> Quoting Greentime Hu (2021-03-17 23:08:09)
>> > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>> > index 71ab75a46491..f094df93d911 100644
>> > --- a/drivers/reset/Kconfig
>> > +++ b/drivers/reset/Kconfig
>> > @@ -173,7 +173,7 @@ config RESET_SCMI
>> >
>> > config RESET_SIMPLE
>> > bool "Simple Reset Controller Driver" if COMPILE_TEST
>> > - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
>> > + default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC || RISCV
>>
>> This conflicts. Can this default be part of the riscv defconfig instead?
>>
>
> Maybe I should remove this since it has been selected by CLK_SIFIVE_PRCI?
>
> config CLK_SIFIVE_PRCI
> bool "PRCI driver for SiFive SoCs"
> + select RESET_CONTROLLER
> + select RESET_SIMPLE

Ya, that's better. IIRC I suggested something similar in some other
version, but I might have not actually sent the mail.

>
>> > help
>> > This enables a simple reset controller driver for reset lines that
>> > that can be asserted and deasserted by toggling bits in a contiguous,
>> > @@ -187,6 +187,7 @@ config RESET_SIMPLE
>> > - RCC reset controller in STM32 MCUs
>> > - Allwinner SoCs
>> > - ZTE's zx2967 family
>> > + - SiFive FU740 SoCs
>> >
>> > config RESET_STM32MP157
>> > bool "STM32MP157 Reset Driver" if COMPILE_TEST