Linux clock framework development
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From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Linux MMC List <linux-mmc@vger.kernel.org>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: Re: [RFC PATCH 4/9] clk: renesas: gen3: switch to new SD clock handling
Date: Thu, 21 Oct 2021 11:59:03 +0200	[thread overview]
Message-ID: <YXE5597s0BigDNzu@ninjato> (raw)
In-Reply-To: <CAMuHMdUdjNXkW-F0-aPR-o6uQaHsYz=yKf6RhC2tvxRpdhDzhw@mail.gmail.com>

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Hi Geert,

> BTW, the diff looks much better with the --histogram option of
> git diff/show.

Thanks, I tend to forget this option.

> > +       if (IS_ERR(clk))
> > +               return clk;
> 
> Missing "kfree(csn)".

Ouch, yes!

> > +       return clk_register_divider_table(NULL, name, parent_name, 0, sdnckcr,
> > +                                         0, 2, 0, cpg_sd_div_table, &cpg_lock);
> 
> So the SDn clock can no longer be disabled, as CPG_SD_STP_CK
> handling is gone?

Yes. I thought we can do it since we had 7f2c2f38c1c0 ("clk: renesas:
rcar-gen3: Remove stp_ck handling for SDHI") anyhow.

> > +       if (ref_clk == priv->clkh)
> 
> "if (priv->clkh)", for consistency with above?

Can do. I even had this originally. Then, I thought the comparison makes
it easier to understand. But it seems, it is understandable enough
without the comparison.

> > +       /* Fallback for old DTs */
> > +       if (of_device_is_compatible(pdev->dev.of_node, "renesas,rcar-gen3-sdhi"))
> 
> I think it would be cleaner to check a flag in struct
> renesas_sdhi_of_data instead.

Because new SoCs with the fallback compatible might show up?

> >          * Some controllers provide a 2nd clock just to run the internal card
> >          * detection logic. Unfortunately, the existing driver architecture does
> 
> The core looks good to me, but I have to admit I'm no expert on the
> SDHn/SDn clock relations and the various SDHI transfer modes.

I am really glad you like the changes in general. And you point to the
reason for this change. All the clock relations of the SDHI transfer
modes should go into the SDHI driver. Now, we can control SDnH and SDn
seperately, so the SDHI driver can do the proper things depending on the
mode and the quirks of the SDHI instance. I really think the clock
driver part should be as simple as it is with this series.

Thanks for the review, I will fix the other minor issues soon as well.

Happy hacking,

   Wolfram


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  reply	other threads:[~2021-10-21  9:59 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-28 20:07 [RFC PATCH 0/9] clk/mmc: renesas_sdhi: refactor SDnH to be a seperate clock Wolfram Sang
2021-09-28 20:07 ` [RFC PATCH 1/9] clk: renesas: gen3-cpg: add dummy SDnH clock Wolfram Sang
2021-10-11 18:03   ` Geert Uytterhoeven
2021-09-28 20:07 ` [RFC PATCH 2/9] clk: renesas: add SDnH clock to Gen3 SoCs Wolfram Sang
2021-10-11 18:03   ` Geert Uytterhoeven
2021-09-28 20:07 ` [RFC PATCH 3/9] clk: renesas: r8a779a0: add SDnH clock to V3U Wolfram Sang
2021-10-11 18:03   ` Geert Uytterhoeven
2021-09-28 20:07 ` [RFC PATCH 4/9] clk: renesas: gen3: switch to new SD clock handling Wolfram Sang
2021-10-13  8:33   ` Geert Uytterhoeven
2021-10-21  9:59     ` Wolfram Sang [this message]
2021-10-21 11:10       ` Geert Uytterhoeven
2021-09-28 20:08 ` [RFC PATCH 5/9] clk: renesas: gen3-cpg: remove outdated SD_SKIP_FIRST Wolfram Sang
2021-10-11 18:03   ` Geert Uytterhoeven
2021-09-28 20:08 ` [RFC PATCH 6/9] dt-bindings: mmc: renesas,sdhi: add optional SDnH clock Wolfram Sang
2021-10-11 18:04   ` Geert Uytterhoeven
2021-09-28 20:08 ` [RFC PATCH 7/9] arm64: dts: r8a77951: add SDnH clocks Wolfram Sang
2021-10-11 18:04   ` Geert Uytterhoeven
2021-09-28 20:08 ` [RFC PATCH 8/9] arm64: dts: r8a77965: " Wolfram Sang
2021-10-11 18:04   ` Geert Uytterhoeven
2021-09-28 20:08 ` [RFC PATCH 9/9] mmc: renesas_sdhi: parse DT for SDnH Wolfram Sang
2021-10-11 18:04   ` Geert Uytterhoeven

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