Re: [PATCH v2 01/15] dt-bindings: ARM: Mediatek: Add new document bindings of MT8186 clock

Chun-Jie Chen
2022-03-11T04:38:01Z

On Fri, 2022-03-11 at 07:45 +0800, Miles Chen wrote:
> Hi Chun-Jie,
>
> > [PATCH v2 01/15] dt-bindings: ARM: Mediatek: Add new document
> > bindings of MT8186 clock
>
> s/Mediatek/MediaTek/
>
> > This patch adds the new binding documentation for system clock
> > and functional clock on Mediatek MT8186.
>
> s/Mediatek/MediaTek/
> >
> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
> > ---
> > .../arm/mediatek/mediatek,mt8186-clock.yaml | 56 +++
> > .../mediatek/mediatek,mt8186-sys-clock.yaml | 54 +++
> > include/dt-bindings/clock/mt8186-clk.h | 445
> > ++++++++++++++++++
> > 3 files changed, 555 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-
> > clock.yaml
> > create mode 100644
> > Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-
> > clock.yaml
> > create mode 100644 include/dt-bindings/clock/mt8186-clk.h
> >
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-
> > clock.yaml
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-
> > clock.yaml
> > new file mode 100644
> > index 000000000000..373e8a100da3
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-
> > clock.yaml
> > @@ -0,0 +1,56 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: "
> > http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-clock.yaml#
> > "
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Mediatek Functional Clock Controller for MT8186
>
> s/Mediatek/MediaTek/
>
> > +
> > +maintainers:
> > + - Chun-Jie Chen <chun-jie.chen@mediatek.com>
> > +
> > +description:
> > + The clock architecture in Mediatek like below
>
> s/Mediatek/MediaTek/
>
> > + PLLs -->
> > + dividers -->
> > + muxes
> > + -->
> > + clock gate
> > +
> > + The devices provide clock gate control in different IP blocks.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - enum:
> > + - mediatek,mt8186-imp_iic_wrap
> > + - mediatek,mt8186-mfgsys
> > + - mediatek,mt8186-wpesys
> > + - mediatek,mt8186-imgsys1
> > + - mediatek,mt8186-imgsys2
> > + - mediatek,mt8186-vdecsys
> > + - mediatek,mt8186-vencsys
> > + - mediatek,mt8186-camsys
> > + - mediatek,mt8186-camsys_rawa
> > + - mediatek,mt8186-camsys_rawb
> > + - mediatek,mt8186-mdpsys
> > + - mediatek,mt8186-ipesys
> > + reg:
> > + maxItems: 1
> > +
> > + '#clock-cells':
> > + const: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + imp_iic_wrap: clock-controller@11017000 {
> > + compatible = "mediatek,mt8186-imp_iic_wrap";
> > + reg = <0x11017000 0x1000>;
> > + #clock-cells = <1>;
> > + };
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-
> > sys-clock.yaml
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-
> > sys-clock.yaml
> > new file mode 100644
> > index 000000000000..4c071dd66b76
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-
> > sys-clock.yaml
> > @@ -0,0 +1,54 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: "
> > http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-sys-clock.yaml#
> > "
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Mediatek System Clock Controller for MT8186
> >
>
> s/Mediatek/MediaTek/
>
> > +
> > +maintainers:
> > + - Chun-Jie Chen <chun-jie.chen@mediatek.com>
> > +
> > +description:
> > + The clock architecture in Mediatek like below
>
> s/Mediatek/MediaTek/
>
> Thanks,
> Miles

Ok, I will check binding document and all patch messages in this
series.

Thanks!