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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?rti14xvjmAEhcQJTnOQtEk+k3tH/8MmDBjf+Ykw9jokWzH9E41N6LaHtfluz?= =?us-ascii?Q?gTa9w/Q3MFffgFHA9raHFXCveKAJeHm/ueCrAMvj6NNUU3H0u9DOOKTdaO3v?= =?us-ascii?Q?WK1wdbX0GmQFdVRuTuGevzsznlcXYrLBmaSm9q6FAazFrA3LNShbpF54fOY3?= =?us-ascii?Q?g6kM/TMVCb7GqZy2fLIaxSDTAcu2cxvcLgJwslHGeqFmUkVlPPgKeCXrGtsl?= =?us-ascii?Q?pYZ16TGjAlkbvZPZYI+THzEkPn3pKr4i0p6Zu8yBqCAuEmAHqqypQBAZZgZr?= =?us-ascii?Q?3S9+eVRoB+j86I3qGkT9lhVkWmHq+4f0cQ6Fl1L/7zSQK6tiElyI4qwGBVbW?= =?us-ascii?Q?z0qsrsihtPcnTjv4qbUfb5Lp80EoXhWaDXvNtyor748I2zhwSGUbtfXwCu37?= =?us-ascii?Q?6OfQKXtqO7VoFKbzcf34UfbIrh19cvknTGrw/PqqME3Het+NbZYWin7K6Flf?= =?us-ascii?Q?/zJncHjYPKxK0g324TioyeRwtbOsjQ8JOjctP54LhRQfvOFrefm7EM+CYMyy?= =?us-ascii?Q?LjAsFcpLXtL1rfwDpfqUTnGKgo2ARaQLE1VSQf8baMKTn0fGTLXfhCT+fw1A?= =?us-ascii?Q?9BhqaoR1G8CLLFXvN1VQMc+xYZ2E65VQjA0CJrI16aqBX3zgur2sRo/Vg7T8?= =?us-ascii?Q?F3rTzUdPG1S4BcJWV7iO9RX4xwX/wN5eWamsdA3bmxd6tYauEZrJwnhjaK2O?= =?us-ascii?Q?VWiY06wW+rfemYHveejVeWUUCHfjxrWwy84ZAhtTHtLBdvCpaG/NPqCBDSeS?= =?us-ascii?Q?QKDQlCcD4qKWoVWKSOhK1WYHztJGvjTMqXOAVbnoEc4hIYkCVT7I2bjLCjrL?= =?us-ascii?Q?rbwdhsV8l7zU7xTzWGhqmQAhK+XYFBpF09m55pJCkeuzRYul/LGOLW8KN6N6?= =?us-ascii?Q?z/Gtm2rEmb0ziQewR5EdL6cM0+FoGo2RfMzMxH645sXypIu8K8kprLbXdUyZ?= =?us-ascii?Q?abRd2+Bp26Yym1cRgwUCS+r/zlfiWVSDPuXccnr9Q+gyga+9obAZIq8CP+97?= =?us-ascii?Q?gwb8fhs2iFTsClPQN+Qoy5SEbrRWJwlybf7qIAZIEf3DFaoupvS2PaIC6rlM?= =?us-ascii?Q?q4i+fRVz4PG1b2MxvoaTibUat9grD18hGNg3uWDOfQ67tLgTiiQYKKrN8pBM?= =?us-ascii?Q?M7TWs/MUxrkLOiPrzYHB6bnqZFJm127tZi1A/0QrwDkFDMrJeicTHj8fwc05?= =?us-ascii?Q?SxEe7tqnUOCOccInfybgJtmlPI4Vg8htkipzD7ROXHQgpVzHi/FH9DSOerud?= =?us-ascii?Q?g6teyeo9y+rheJn3daj2ADb+TZcb5XHn1Vvm0PsERbOLyQ+QCiP6pdMc/A3e?= =?us-ascii?Q?WDdqm7yQ5J9nyXk6brqyZrdOgrk/TCEDz8nNUTI5EuA9nzsWkSE8u4AZWQsv?= =?us-ascii?Q?X6/EwytM8lcX/8dvSZy/ST83NaoYIxcZNZNv4seXQyxepuNCaD5LFAF2PmKT?= =?us-ascii?Q?Qqvsg1qMd5f0k9+/BOKlU0CJI71lE/VGyb835NUnvX6ofjioQrYvDBCrRkZI?= =?us-ascii?Q?NaTRbstu4NPI1yR95FZ8tUHxSD+9sh4Kes0kD/2noy1xrFO/Us0NDByWCIx6?= =?us-ascii?Q?HEDItLIfC7IIxjvDR7tUFXkdYbwT07Ymw8r3liy3BEYCz0g2Ac0aWftrWkwH?= =?us-ascii?Q?JWEdV6RHUopRT+5MSRlbF8Y=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0d2212bd-2fa0-46f3-00b9-08d9fdba7a6d X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB4688.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Mar 2022 08:39:21.1219 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ioMbN7zoRbNZySER+o08bJt9qO9Hralhi5vgJvyhMj55VjcguWBV7JsFjs97swtO3VBr6qeCbZ5njSXod3e18Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8599 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 22-02-25 16:13:06, Abel Vesa wrote: > On 22-02-25 09:29:37, Sascha Hauer wrote: > > The pll1443x PLL so far only supports rates from a rate table passed > > during initialization. Calculating PLL settings dynamically helps audio > > applications to get their desired rates, so support for this is added > > in this patch. > > > > The strategy to get to the PLL setting for a rate is: > > > > - First try to only adjust kdiv which specifies the fractional part of the PLL. > > This setting can be changed without glitches on the output and is therefore > > preferred > > - When that isn't possible then the rate table is searched for suitable rates, > > so for standard rates the same settings are used as without this patch > > - As a last resort the best settings are calculated dynamically > > > > The code in this patch is based on patches from Adrian Alonso > > and Mads Bligaard Nielsen > > Hmm, I wish this was also possible for SSCG plls. > > > > > Signed-off-by: Sascha Hauer > > --- > > drivers/clk/imx/clk-pll14xx.c | 143 ++++++++++++++++++++++++++++++---- > > 1 file changed, 126 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c > > index 646e0ce7d6242..eef0f3b693ed9 100644 > > --- a/drivers/clk/imx/clk-pll14xx.c > > +++ b/drivers/clk/imx/clk-pll14xx.c > > @@ -29,6 +29,8 @@ > > #define PDIV_MASK GENMASK(9, 4) > > #define SDIV_MASK GENMASK(2, 0) > > #define KDIV_MASK GENMASK(15, 0) > > +#define KDIV_MIN SHRT_MIN > > +#define KDIV_MAX SHRT_MAX > > > > #define LOCK_TIMEOUT_US 10000 > > > > @@ -113,7 +115,106 @@ static long pll14xx_calc_rate(struct clk_pll14xx *pll, int mdiv, int pdiv, > > return fvco; > > } > > > > -static long clk_pll14xx_round_rate(struct clk_hw *hw, unsigned long rate, > > +static long pll1443x_calc_kdiv(int mdiv, int pdiv, int sdiv, > > + unsigned long rate, unsigned long prate) > > +{ > > + long kdiv; > > + > > + /* calc kdiv = round(rate * pdiv * 65536 * 2^sdiv / prate) - (mdiv * 65536) */ > > + kdiv = ((rate * ((pdiv * 65536) << sdiv) + prate / 2) / prate) - (mdiv * 65536); > > + > > + return clamp_t(short, kdiv, KDIV_MIN, KDIV_MAX); > > +} > > + > > +static void imx_pll14xx_calc_settings(struct clk_pll14xx *pll, unsigned long rate, > > + unsigned long prate, struct imx_pll14xx_rate_table *t) > > +{ > > + u32 pll_div_ctl0, pll_div_ctl1; > > + int mdiv, pdiv, sdiv, kdiv; > > + long fvco, rate_min, rate_max, dist, best = LONG_MAX; > > + const struct imx_pll14xx_rate_table *tt; > > + > > + /* > > + * Fractional PLL constrains: > > + * > > + * a) 6MHz <= prate <= 25MHz > > + * b) 1 <= p <= 63 (1 <= p <= 4 prate = 24MHz) > > + * c) 64 <= m <= 1023 > > + * d) 0 <= s <= 6 > > + * e) -32768 <= k <= 32767 > > + * > > + * fvco = (m * 65536 + k) * prate / (p * 65536) > > + */ > > + > > + pll_div_ctl0 = readl_relaxed(pll->base + DIV_CTL0); > > + mdiv = FIELD_GET(MDIV_MASK, pll_div_ctl0); > > + pdiv = FIELD_GET(PDIV_MASK, pll_div_ctl0); > > + sdiv = FIELD_GET(SDIV_MASK, pll_div_ctl0); > > + pll_div_ctl1 = readl_relaxed(pll->base + DIV_CTL1); > > + > > + /* First see if we can get the desired rate by only adjusting kdiv (glitch free) */ > > + rate_min = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MIN, prate); > > + rate_max = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MAX, prate); > > + > > + if (rate >= rate_min && rate <= rate_max) { > > + kdiv = pll1443x_calc_kdiv(mdiv, pdiv, sdiv, rate, prate); > > + pr_debug("%s: in=%ld, want=%ld Only adjust kdiv %ld -> %d\n", > > + clk_hw_get_name(&pll->hw), prate, rate, > > + FIELD_GET(KDIV_MASK, pll_div_ctl1), kdiv); > > + fvco = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, kdiv, prate); > > + t->rate = (unsigned int)fvco; > > + t->mdiv = mdiv; > > + t->pdiv = pdiv; > > + t->sdiv = sdiv; > > + t->kdiv = kdiv; > > + return; > > + } > > + > > + /* Then try if we can get the desired rate from one of the static entries */ > > + tt = imx_get_pll_settings(pll, rate); > > Shouldn't we try this one first? Maybe we don't need to compute kdiv at > all. > Ping. > > + if (tt) { > > + pr_debug("%s: in=%ld, want=%ld, Using PLL setting from table\n", > > + clk_hw_get_name(&pll->hw), prate, rate); > > + t->rate = tt->rate; > > + t->mdiv = tt->mdiv; > > + t->pdiv = tt->pdiv; > > + t->sdiv = tt->sdiv; > > + t->kdiv = tt->kdiv; > > + return; > > + } > > + > > + /* Finally calculate best values */ > > + for (pdiv = 1; pdiv <= 7; pdiv++) { > > + for (sdiv = 0; sdiv <= 6; sdiv++) { > > + /* calc mdiv = round(rate * pdiv * 2^sdiv) / prate) */ > > + mdiv = DIV_ROUND_CLOSEST(rate * (pdiv << sdiv), prate); > > + mdiv = clamp(mdiv, 64, 1023); > > + > > + kdiv = pll1443x_calc_kdiv(mdiv, pdiv, sdiv, rate, prate); > > + fvco = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, kdiv, prate); > > + > > + /* best match */ > > + dist = abs((long)rate - (long)fvco); > > + if (dist < best) { > > + best = dist; > > + t->rate = (unsigned int)fvco; > > + t->mdiv = mdiv; > > + t->pdiv = pdiv; > > + t->sdiv = sdiv; > > + t->kdiv = kdiv; > > + > > + if (!dist) > > + goto found; > > + } > > + } > > + } > > +found: > > + pr_debug("%s: in=%ld, want=%ld got=%d (pdiv=%d sdiv=%d mdiv=%d kdiv=%d)\n", > > + clk_hw_get_name(&pll->hw), prate, rate, t->rate, t->pdiv, t->sdiv, > > + t->mdiv, t->kdiv); > > +} > > + > > +static long clk_pll1416x_round_rate(struct clk_hw *hw, unsigned long rate, > > unsigned long *prate) > > { > > struct clk_pll14xx *pll = to_clk_pll14xx(hw); > > @@ -129,6 +230,17 @@ static long clk_pll14xx_round_rate(struct clk_hw *hw, unsigned long rate, > > return rate_table[pll->rate_count - 1].rate; > > } > > > > +static long clk_pll1443x_round_rate(struct clk_hw *hw, unsigned long rate, > > + unsigned long *prate) > > +{ > > + struct clk_pll14xx *pll = to_clk_pll14xx(hw); > > + struct imx_pll14xx_rate_table t; > > + > > + imx_pll14xx_calc_settings(pll, rate, *prate, &t); > > + > > + return t.rate; > > +} > > + > > static unsigned long clk_pll14xx_recalc_rate(struct clk_hw *hw, > > unsigned long parent_rate) > > { > > @@ -239,25 +351,21 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate, > > unsigned long prate) > > { > > struct clk_pll14xx *pll = to_clk_pll14xx(hw); > > - const struct imx_pll14xx_rate_table *rate; > > + struct imx_pll14xx_rate_table rate; > > u32 gnrl_ctl, div_ctl0; > > int ret; > > > > - rate = imx_get_pll_settings(pll, drate); > > - if (!rate) { > > - pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__, > > - drate, clk_hw_get_name(hw)); > > - return -EINVAL; > > - } > > + imx_pll14xx_calc_settings(pll, drate, prate, &rate); > > > > div_ctl0 = readl_relaxed(pll->base + DIV_CTL0); > > > > - if (!clk_pll14xx_mp_change(rate, div_ctl0)) { > > + if (!clk_pll14xx_mp_change(&rate, div_ctl0)) { > > + /* only sdiv and/or kdiv changed - no need to RESET PLL */ > > div_ctl0 &= ~SDIV_MASK; > > - div_ctl0 |= FIELD_PREP(SDIV_MASK, rate->sdiv); > > + div_ctl0 |= FIELD_PREP(SDIV_MASK, rate.sdiv); > > writel_relaxed(div_ctl0, pll->base + DIV_CTL0); > > > > - writel_relaxed(FIELD_PREP(KDIV_MASK, rate->kdiv), > > + writel_relaxed(FIELD_PREP(KDIV_MASK, rate.kdiv), > > pll->base + DIV_CTL1); > > > > return 0; > > @@ -272,11 +380,12 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate, > > gnrl_ctl |= BYPASS_MASK; > > writel_relaxed(gnrl_ctl, pll->base + GNRL_CTL); > > > > - div_ctl0 = FIELD_PREP(MDIV_MASK, rate->mdiv) | > > - FIELD_PREP(PDIV_MASK, rate->pdiv) | > > - FIELD_PREP(SDIV_MASK, rate->sdiv); > > + div_ctl0 = FIELD_PREP(MDIV_MASK, rate.mdiv) | > > + FIELD_PREP(PDIV_MASK, rate.pdiv) | > > + FIELD_PREP(SDIV_MASK, rate.sdiv); > > writel_relaxed(div_ctl0, pll->base + DIV_CTL0); > > - writel_relaxed(FIELD_PREP(KDIV_MASK, rate->kdiv), pll->base + DIV_CTL1); > > + > > + writel_relaxed(FIELD_PREP(KDIV_MASK, rate.kdiv), pll->base + DIV_CTL1); > > > > /* > > * According to SPEC, t3 - t2 need to be greater than > > @@ -359,7 +468,7 @@ static const struct clk_ops clk_pll1416x_ops = { > > .unprepare = clk_pll14xx_unprepare, > > .is_prepared = clk_pll14xx_is_prepared, > > .recalc_rate = clk_pll14xx_recalc_rate, > > - .round_rate = clk_pll14xx_round_rate, > > + .round_rate = clk_pll1416x_round_rate, > > .set_rate = clk_pll1416x_set_rate, > > }; > > > > @@ -372,7 +481,7 @@ static const struct clk_ops clk_pll1443x_ops = { > > .unprepare = clk_pll14xx_unprepare, > > .is_prepared = clk_pll14xx_is_prepared, > > .recalc_rate = clk_pll14xx_recalc_rate, > > - .round_rate = clk_pll14xx_round_rate, > > + .round_rate = clk_pll1443x_round_rate, > > .set_rate = clk_pll1443x_set_rate, > > }; > > > > -- > > 2.30.2 > >