From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Robert Foss <robert.foss@linaro.org>
Cc: agross@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
robh+dt@kernel.org, krzk+dt@kernel.org, jonathan@marek.ca,
tdas@codeaurora.org, anischal@codeaurora.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Subject: Re: [PATCH v2 8/8] arm64: dts: qcom: sm8350: Add DISPCC node
Date: Tue, 3 May 2022 12:27:43 -0500 [thread overview]
Message-ID: <YnFmD8pEmPxpXex7@builder.lan> (raw)
In-Reply-To: <20220503130448.520470-8-robert.foss@linaro.org>
On Tue 03 May 08:04 CDT 2022, Robert Foss wrote:
> Add the dispcc clock-controller DT node for sm8350.
>
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index 52428b6df64e..94c2519e9f48 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -3,7 +3,9 @@
> * Copyright (c) 2020, Linaro Limited
> */
>
> +#include <dt-bindings/interconnect/qcom,sm8350.h>
This looks unrelated.
Rest looks good.
Regards,
Bjorn
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/qcom,dispcc-sm8350.h>
> #include <dt-bindings/clock/qcom,gcc-sm8350.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/dma/qcom-gpi.h>
> @@ -2525,6 +2527,31 @@ usb_2_dwc3: usb@a800000 {
> };
> };
>
> + dispcc: clock-controller@af00000 {
> + compatible = "qcom,sm8350-dispcc";
> + reg = <0 0x0af00000 0 0x10000>;
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <0>,
> + <0>,
> + <0>,
> + <0>,
> + <0>,
> + <0>;
> + clock-names = "bi_tcxo",
> + "dsi0_phy_pll_out_byteclk",
> + "dsi0_phy_pll_out_dsiclk",
> + "dsi1_phy_pll_out_byteclk",
> + "dsi1_phy_pll_out_dsiclk",
> + "dp_phy_pll_link_clk",
> + "dp_phy_pll_vco_div_clk";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> +
> + power-domains = <&rpmhpd SM8350_MMCX>;
> + power-domain-names = "mmcx";
> + };
> +
> adsp: remoteproc@17300000 {
> compatible = "qcom,sm8350-adsp-pas";
> reg = <0 0x17300000 0 0x100>;
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-05-03 17:27 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-03 13:04 [PATCH v2 1/8] clk: qcom: rcg2: Cache rate changes for parked RCGs Robert Foss
2022-05-03 13:04 ` [PATCH v2 2/8] clk: Introduce CLK_ASSUME_ENABLED_WHEN_UNUSED Robert Foss
2022-05-03 15:02 ` Bjorn Andersson
2022-05-03 16:23 ` Robert Foss
2022-05-03 13:04 ` [PATCH v2 3/8] clk: qcom: sm8250-dispcc: Flag shared RCGs as assumed enable Robert Foss
2022-05-03 13:04 ` [PATCH v2 4/8] clk: qcom: add support for SM8350 GPUCC Robert Foss
2022-05-03 17:21 ` Bjorn Andersson
2022-05-03 20:39 ` Jonathan Marek
2022-05-04 12:24 ` Robert Foss
2022-05-03 13:04 ` [PATCH v2 5/8] dt-bindings: clock: Add Qcom SM8350 GPUCC bindings Robert Foss
2022-05-03 17:24 ` Bjorn Andersson
2022-05-03 13:04 ` [PATCH v2 6/8] clk: qcom: add support for SM8350 DISPCC Robert Foss
2022-05-03 17:25 ` Bjorn Andersson
2022-05-03 17:47 ` Robert Foss
2022-05-03 13:04 ` [PATCH v2 7/8] dt-bindings: clock: Add Qcom SM8350 DISPCC bindings Robert Foss
2022-05-03 17:26 ` Bjorn Andersson
2022-05-03 17:47 ` Robert Foss
2022-05-03 13:04 ` [PATCH v2 8/8] arm64: dts: qcom: sm8350: Add DISPCC node Robert Foss
2022-05-03 17:27 ` Bjorn Andersson [this message]
2022-05-03 15:01 ` [PATCH v2 1/8] clk: qcom: rcg2: Cache rate changes for parked RCGs Bjorn Andersson
2022-05-03 16:23 ` Robert Foss
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YnFmD8pEmPxpXex7@builder.lan \
--to=bjorn.andersson@linaro.org \
--cc=agross@kernel.org \
--cc=anischal@codeaurora.org \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=jonathan@marek.ca \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=robert.foss@linaro.org \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=tdas@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).