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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id r185-20020acadac2000000b0035173c2fddasm1336103oig.51.2022.10.01.12.04.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Oct 2022 12:04:13 -0700 (PDT) Date: Sat, 1 Oct 2022 15:04:10 -0400 From: William Breathitt Gray To: Biju Das Cc: William Breathitt Gray , Rob Herring , Krzysztof Kozlowski , Philipp Zabel , Michael Turquette , Stephen Boyd , Geert Uytterhoeven , Lee Jones , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , "linux-pwm@vger.kernel.org" , "linux-iio@vger.kernel.org" , "linux-clk@vger.kernel.org" , "devicetree@vger.kernel.org" , Chris Paterson , Biju Das , Prabhakar Mahadev Lad , "linux-renesas-soc@vger.kernel.org" Subject: Re: [PATCH RFC 0/8] Add RZ/G2L MTU3a MFD and Counter driver Message-ID: References: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="DroVQK3V/OFL30Ej" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org --DroVQK3V/OFL30Ej Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Oct 01, 2022 at 06:51:48PM +0000, Biju Das wrote: > > On Sat, Oct 01, 2022 at 06:03:37PM +0000, Biju Das wrote: > > > > What is the configuration when 32-bit phase counting mode is > > selected? > > > > > > LWA Bit (MTU1/MTU2 Combination Longword Access Control) needs to set > > for 32-bit phase counting mode. > > > > > > b0 LWA 0 R/W MTU1/MTU2 Combination Longword Access Control > > > 0: 16-bit access is enabled. > > > 1: 32-bit access is enabled. > > > > > > > Does MTCLKA and MTCLKB serve as the counting signals in this case, > > > > > > For 16-bit and 32-bit counting signals same. We can set > > > > > > 1) MTU 1 and MTU2 signals as MTCLKA and MTCLKB > > > > > > Or > > > > > > 2) MTU 1 signal as MTCLKA and MTCLKB and MTU2 signals as MTCLKC and > > > MTCLKD > >=20 > > I'm having trouble understanding this case. If 32-bit access is > > enabled by setting the LWA bit, and the MTU1 signals are configured as > > MTCLKA and MTCLKB while at the same time the MTU2 signals are > > configured as MTCLKC and MTCLKD, how is the 32-bit count value > > determined -- wouldn't > > MTU1 and MTU2 be counting independently if they each had separate > > input clocks fed to them? >=20 > It is taken care by the HW. We just configure the register as mentioned b= elow > and hardware provide counter values once feeding the signals to=20 > either > {MTCLKA and MTCLKB} for both MTU1 and MTU2=20 >=20 > or=20 >=20 > MTU1{MTCLKA and MTCLKB} and MTU2{MTCLKC and MTCLKD} >=20 > The signal feeding is same for 16-bit and 32-bit phase modes. >=20 > Note:- I haven't tested 32-bit mode yet.=20 >=20 > Cheers, > Biju I'm not quite grokking it yet, but I'll trust that you're right for now. I suspect it'll make more sense to me once your next revision is submitted and I've had time to evaluate the code more closely. Thanks, William Breathitt Gray >=20 > >=20 > > > > > > > > > b1 PHCKSEL 1 R/W External Input Phase Clock Select Selects the > > > external clock pin for phase counting mode. > > > 0: MTCLKA and MTCLKB are selected for the external phase clock. > > > 1: MTCLKC and MTCLKD are selected for the external phase clock > > > > > > > with overflows on the MTU1 register incrementing the MTU2 > > register? > > > > > > No. that won't happen as we need to use different register for Long > > > word access > > > > > > These are the regiters used > > > 16-bit:- TCNT{MTU1,MTU2}, TGRA{MTU1,MTU2}, and TGRB{MTU1,MTU2}, > > > 32-bit:- MTU1.TCNT_1_LW, MTU1.TGRA_1_LW and MTU1.TGRB_1_LW > > > > > > Counter in MTU1 MTU1.TCNT Word MTU1.TCNT_1_LW Longword > > > Counter in MTU2 MTU2.TCNT Word > > > > > > General register A in MTU1 MTU1.TGRA Word MTU1.TGRA_1_LW Longword > > > General register A in MTU2 MTU2.TGRA Word > > > > > > General register B in MTU1 MTU1.TGRB Word MTU1.TGRB_1_LW Longword > > > General register B in MTU2 MTU2.TGRB Word > > > > > > Cheers, > > > Biju --DroVQK3V/OFL30Ej Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEARYKAB0WIQSNN83d4NIlKPjon7a1SFbKvhIjKwUCYziPKgAKCRC1SFbKvhIj K9GFAQCIBcdC2Bbyfuc26q9OuG3EqCblPlRsaeBItgi8YuulDAD+PIgKaHLii3LP DnHvCEadS3bsWtKNqbVTpeVpXWDTlgM= =QZVB -----END PGP SIGNATURE----- --DroVQK3V/OFL30Ej--