Re: [PATCH RFC v6 2/6] dpll: Add DPLL framework base functions

Jiri Pirko
2023-03-16T12:37:26Z

Sun, Mar 12, 2023 at 03:28:03AM CET, vadfed@meta.com wrote:

[...]

>+struct dpll_pin *
>+dpll_pin_alloc(u64 clock_id, u8 device_drv_id, struct module *module,
>+ const struct dpll_pin_properties *prop)
>+{
>+ struct dpll_pin *pin;
>+ int ret;
>+
>+ pin = kzalloc(sizeof(*pin), GFP_KERNEL);
>+ if (!pin)
>+ return ERR_PTR(-ENOMEM);
>+ pin->dev_driver_id = device_drv_id;
>+ pin->clock_id = clock_id;
>+ pin->module = module;
>+ refcount_set(&pin->refcount, 1);
>+ if (WARN_ON(!prop->description)) {

Why is this mandatory? I'm now working on mlx5 implementation, don't
really know what to put here for SyncE. The type of the pin SyncE tells
all I need. I would like to avoid description fill-up.

>+ ret = -EINVAL;
>+ goto release;
>+ }
>+ pin->prop.description = kstrdup(prop->description, GFP_KERNEL);
>+ if (!pin->prop.description) {
>+ ret = -ENOMEM;
>+ goto release;
>+ } …