* [PATCH net-next 01/11] tools: ynl-gen: fix enum index in _decode_enum(..)
2023-07-20 9:18 [PATCH net-next 00/11] Create common DPLL configuration API Vadim Fedorenko
@ 2023-07-20 9:18 ` Vadim Fedorenko
2023-07-20 13:40 ` Jiri Pirko
2023-07-20 9:18 ` [PATCH net-next 02/11] tools: ynl-gen: fix parse multi-attr enum attribute Vadim Fedorenko
` (11 subsequent siblings)
12 siblings, 1 reply; 62+ messages in thread
From: Vadim Fedorenko @ 2023-07-20 9:18 UTC (permalink / raw)
To: Jakub Kicinski, Jiri Pirko, Arkadiusz Kubalewski, Jonathan Lemon,
Paolo Abeni
Cc: Milena Olech, Michal Michalik, Vadim Fedorenko, linux-arm-kernel,
poros, mschmidt, netdev, linux-clk, Bart Van Assche
From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Remove wrong index adjustement, which is leftover from adding
support for sparse enums.
enum.entries_by_val() function shall not subtract the start-value, as
it is indexed with real enum value.
Fixes: c311aaa74ca1 ("tools: ynl: fix enum-as-flags in the generic CLI")
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
---
tools/net/ynl/lib/ynl.py | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/tools/net/ynl/lib/ynl.py b/tools/net/ynl/lib/ynl.py
index 1b3a36fbb1c3..3908438d3716 100644
--- a/tools/net/ynl/lib/ynl.py
+++ b/tools/net/ynl/lib/ynl.py
@@ -420,16 +420,14 @@ class YnlFamily(SpecFamily):
def _decode_enum(self, rsp, attr_spec):
raw = rsp[attr_spec['name']]
enum = self.consts[attr_spec['enum']]
- i = attr_spec.get('value-start', 0)
if 'enum-as-flags' in attr_spec and attr_spec['enum-as-flags']:
value = set()
while raw:
if raw & 1:
- value.add(enum.entries_by_val[i].name)
+ value.add(enum.entries_by_val[raw & 1].name)
raw >>= 1
- i += 1
else:
- value = enum.entries_by_val[raw - i].name
+ value = enum.entries_by_val[raw].name
rsp[attr_spec['name']] = value
def _decode_binary(self, attr, attr_spec):
--
2.27.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH net-next 01/11] tools: ynl-gen: fix enum index in _decode_enum(..)
2023-07-20 9:18 ` [PATCH net-next 01/11] tools: ynl-gen: fix enum index in _decode_enum(..) Vadim Fedorenko
@ 2023-07-20 13:40 ` Jiri Pirko
2023-07-20 13:58 ` Kubalewski, Arkadiusz
0 siblings, 1 reply; 62+ messages in thread
From: Jiri Pirko @ 2023-07-20 13:40 UTC (permalink / raw)
To: Vadim Fedorenko
Cc: Jakub Kicinski, Arkadiusz Kubalewski, Jonathan Lemon, Paolo Abeni,
Milena Olech, Michal Michalik, linux-arm-kernel, poros, mschmidt,
netdev, linux-clk, Bart Van Assche
Thu, Jul 20, 2023 at 11:18:53AM CEST, vadim.fedorenko@linux.dev wrote:
>From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>
>Remove wrong index adjustement, which is leftover from adding
s/adjustement/adjustment/
>support for sparse enums.
>enum.entries_by_val() function shall not subtract the start-value, as
>it is indexed with real enum value.
>
>Fixes: c311aaa74ca1 ("tools: ynl: fix enum-as-flags in the generic CLI")
>Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
^ permalink raw reply [flat|nested] 62+ messages in thread* RE: [PATCH net-next 01/11] tools: ynl-gen: fix enum index in _decode_enum(..)
2023-07-20 13:40 ` Jiri Pirko
@ 2023-07-20 13:58 ` Kubalewski, Arkadiusz
2023-07-20 14:48 ` Vadim Fedorenko
0 siblings, 1 reply; 62+ messages in thread
From: Kubalewski, Arkadiusz @ 2023-07-20 13:58 UTC (permalink / raw)
To: Jiri Pirko, Vadim Fedorenko
Cc: Jakub Kicinski, Jonathan Lemon, Paolo Abeni, Olech, Milena,
Michalik, Michal, linux-arm-kernel@lists.infradead.org, poros,
mschmidt, netdev@vger.kernel.org, linux-clk@vger.kernel.org,
Bart Van Assche
>-----Original Message-----
>From: Jiri Pirko <jiri@resnulli.us>
>Sent: Thursday, July 20, 2023 3:40 PM
>
>Thu, Jul 20, 2023 at 11:18:53AM CEST, vadim.fedorenko@linux.dev wrote:
>>From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>>
>>Remove wrong index adjustement, which is leftover from adding
>
>s/adjustement/adjustment/
>
Sure will fix,
Although those "tools: ynl" patches were not intended to be a part of dpll
Series, they are being discussed on the other thread:
https://lore.kernel.org/netdev/20230718162225.231775-1-arkadiusz.kubalewski@intel.com/
I think Vadim have sent them, because I included them in the branch candidate
for next version, seems was not clear enough on that..
I think we can skip them for next submission.
Thank you!
Arkadiusz
>
>>support for sparse enums.
>>enum.entries_by_val() function shall not subtract the start-value, as
>>it is indexed with real enum value.
>>
>>Fixes: c311aaa74ca1 ("tools: ynl: fix enum-as-flags in the generic
>>CLI")
>>Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>>Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
>
>Reviewed-by: Jiri Pirko <jiri@nvidia.com>
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH net-next 01/11] tools: ynl-gen: fix enum index in _decode_enum(..)
2023-07-20 13:58 ` Kubalewski, Arkadiusz
@ 2023-07-20 14:48 ` Vadim Fedorenko
0 siblings, 0 replies; 62+ messages in thread
From: Vadim Fedorenko @ 2023-07-20 14:48 UTC (permalink / raw)
To: Kubalewski, Arkadiusz, Jiri Pirko
Cc: Jakub Kicinski, Jonathan Lemon, Paolo Abeni, Olech, Milena,
Michalik, Michal, linux-arm-kernel@lists.infradead.org, poros,
mschmidt, netdev@vger.kernel.org, linux-clk@vger.kernel.org,
Bart Van Assche
On 20.07.2023 14:58, Kubalewski, Arkadiusz wrote:
>> -----Original Message-----
>> From: Jiri Pirko <jiri@resnulli.us>
>> Sent: Thursday, July 20, 2023 3:40 PM
>>
>> Thu, Jul 20, 2023 at 11:18:53AM CEST, vadim.fedorenko@linux.dev wrote:
>>> From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>>>
>>> Remove wrong index adjustement, which is leftover from adding
>>
>> s/adjustement/adjustment/
>>
>
> Sure will fix,
> Although those "tools: ynl" patches were not intended to be a part of dpll
> Series, they are being discussed on the other thread:
> https://lore.kernel.org/netdev/20230718162225.231775-1-arkadiusz.kubalewski@intel.com/
>
> I think Vadim have sent them, because I included them in the branch candidate
> for next version, seems was not clear enough on that..
> I think we can skip them for next submission.
Yeah, I just realised that these patches have been sent earlier as separate
series and are still under review. Once they are committed I'll remove them
from DPLL series, but for now they are needed for spec generation of DPLL
yaml, so it's good to have them anyway.
> Thank you!
> Arkadiusz
>
>>
>>> support for sparse enums.
>>> enum.entries_by_val() function shall not subtract the start-value, as
>>> it is indexed with real enum value.
>>>
>>> Fixes: c311aaa74ca1 ("tools: ynl: fix enum-as-flags in the generic
>>> CLI")
>>> Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>>> Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
>>
>> Reviewed-by: Jiri Pirko <jiri@nvidia.com>
>
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH net-next 02/11] tools: ynl-gen: fix parse multi-attr enum attribute
2023-07-20 9:18 [PATCH net-next 00/11] Create common DPLL configuration API Vadim Fedorenko
2023-07-20 9:18 ` [PATCH net-next 01/11] tools: ynl-gen: fix enum index in _decode_enum(..) Vadim Fedorenko
@ 2023-07-20 9:18 ` Vadim Fedorenko
2023-07-20 9:18 ` [PATCH net-next 03/11] dpll: documentation on DPLL subsystem interface Vadim Fedorenko
` (10 subsequent siblings)
12 siblings, 0 replies; 62+ messages in thread
From: Vadim Fedorenko @ 2023-07-20 9:18 UTC (permalink / raw)
To: Jakub Kicinski, Jiri Pirko, Arkadiusz Kubalewski, Jonathan Lemon,
Paolo Abeni
Cc: Milena Olech, Michal Michalik, Vadim Fedorenko, linux-arm-kernel,
poros, mschmidt, netdev, linux-clk, Bart Van Assche
From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
When attribute is enum type and marked as multi-attr, the netlink
respond is not parsed, fails with stack trace:
Traceback (most recent call last):
File "/net-next/tools/net/ynl/./test.py", line 520, in <module>
main()
File "/net-next/tools/net/ynl/./test.py", line 488, in main
dplls=dplls_get(282574471561216)
File "/net-next/tools/net/ynl/./test.py", line 48, in dplls_get
reply=act(args)
File "/net-next/tools/net/ynl/./test.py", line 41, in act
reply = ynl.dump(args.dump, attrs)
File "/net-next/tools/net/ynl/lib/ynl.py", line 598, in dump
return self._op(method, vals, dump=True)
File "/net-next/tools/net/ynl/lib/ynl.py", line 584, in _op
rsp_msg = self._decode(gm.raw_attrs, op.attr_set.name)
File "/net-next/tools/net/ynl/lib/ynl.py", line 451, in _decode
self._decode_enum(rsp, attr_spec)
File "/net-next/tools/net/ynl/lib/ynl.py", line 408, in _decode_enum
value = enum.entries_by_val[raw].name
TypeError: unhashable type: 'list'
error: 1
Redesign _decode_enum(..) to take a enum int value and translate
it to either a bitmask or enum name as expected.
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
---
tools/net/ynl/lib/ynl.py | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tools/net/ynl/lib/ynl.py b/tools/net/ynl/lib/ynl.py
index 3908438d3716..06d88f083f95 100644
--- a/tools/net/ynl/lib/ynl.py
+++ b/tools/net/ynl/lib/ynl.py
@@ -417,8 +417,7 @@ class YnlFamily(SpecFamily):
pad = b'\x00' * ((4 - len(attr_payload) % 4) % 4)
return struct.pack('HH', len(attr_payload) + 4, nl_type) + attr_payload + pad
- def _decode_enum(self, rsp, attr_spec):
- raw = rsp[attr_spec['name']]
+ def _decode_enum(self, raw, attr_spec):
enum = self.consts[attr_spec['enum']]
if 'enum-as-flags' in attr_spec and attr_spec['enum-as-flags']:
value = set()
@@ -428,7 +427,7 @@ class YnlFamily(SpecFamily):
raw >>= 1
else:
value = enum.entries_by_val[raw].name
- rsp[attr_spec['name']] = value
+ return value
def _decode_binary(self, attr, attr_spec):
if attr_spec.struct_name:
@@ -436,7 +435,7 @@ class YnlFamily(SpecFamily):
decoded = attr.as_struct(members)
for m in members:
if m.enum:
- self._decode_enum(decoded, m)
+ decoded[m] = self._decode_enum(decoded[m], m)
elif attr_spec.sub_type:
decoded = attr.as_c_array(attr_spec.sub_type)
else:
@@ -464,6 +463,9 @@ class YnlFamily(SpecFamily):
else:
raise Exception(f'Unknown {attr_spec["type"]} with name {attr_spec["name"]}')
+ if 'enum' in attr_spec:
+ decoded = self._decode_enum(int.from_bytes(attr.raw, "big"), attr_spec)
+
if not attr_spec.is_multi:
rsp[attr_spec['name']] = decoded
elif attr_spec.name in rsp:
@@ -471,8 +473,6 @@ class YnlFamily(SpecFamily):
else:
rsp[attr_spec.name] = [decoded]
- if 'enum' in attr_spec:
- self._decode_enum(rsp, attr_spec)
return rsp
def _decode_extack_path(self, attrs, attr_set, offset, target):
--
2.27.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* [PATCH net-next 03/11] dpll: documentation on DPLL subsystem interface
2023-07-20 9:18 [PATCH net-next 00/11] Create common DPLL configuration API Vadim Fedorenko
2023-07-20 9:18 ` [PATCH net-next 01/11] tools: ynl-gen: fix enum index in _decode_enum(..) Vadim Fedorenko
2023-07-20 9:18 ` [PATCH net-next 02/11] tools: ynl-gen: fix parse multi-attr enum attribute Vadim Fedorenko
@ 2023-07-20 9:18 ` Vadim Fedorenko
2023-07-20 13:47 ` Jiri Pirko
2023-07-20 9:18 ` [PATCH net-next 04/11] dpll: spec: Add Netlink spec in YAML Vadim Fedorenko
` (9 subsequent siblings)
12 siblings, 1 reply; 62+ messages in thread
From: Vadim Fedorenko @ 2023-07-20 9:18 UTC (permalink / raw)
To: Jakub Kicinski, Jiri Pirko, Arkadiusz Kubalewski, Jonathan Lemon,
Paolo Abeni
Cc: Vadim Fedorenko, Milena Olech, Michal Michalik, linux-arm-kernel,
poros, mschmidt, netdev, linux-clk, Bart Van Assche,
Bagas Sanjaya
Add documentation explaining common netlink interface to configure DPLL
devices and monitoring events. Common way to implement DPLL device in
a driver is also covered.
Co-developed-by: Bagas Sanjaya <bagasdotme@gmail.com>
Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com>
Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
---
RFC v9->v0:
- fix muxed get-pin command respond example
- fix typos
- describe DPLL_MODE_FREERUN
v8->v9:
- fix docs build warnings
- separate netlink command/attribute list
- replace enum description with uapi header
- add brief explanation what is a DPLL
- fix EOPNOTSUPP typo
- fix typo .state_get -> .state_on_dpll_get
Documentation/driver-api/dpll.rst | 431 +++++++++++++++++++++++++++++
Documentation/driver-api/index.rst | 1 +
2 files changed, 432 insertions(+)
create mode 100644 Documentation/driver-api/dpll.rst
diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst
new file mode 100644
index 000000000000..c11dcb74d11e
--- /dev/null
+++ b/Documentation/driver-api/dpll.rst
@@ -0,0 +1,431 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+===============================
+The Linux kernel dpll subsystem
+===============================
+
+DPLL
+====
+
+PLL - Phase Locked Loop is an electronic circuit which syntonizes clock
+signal of a device with an external clock signal. Effectively enabling
+device to run on the same clock signal beat as provided on a PLL input.
+
+DPLL - Digital Phase Locked Loop is am integrated circuit which in
+addition to plain PLL behavior incorporates a digital phase detector
+and may have digital divider in the loop. As a result, the frequency on
+DPLL's input and output may be configurable.
+
+Subsystem
+=========
+
+The main purpose of dpll subsystem is to provide general interface
+to configure devices that use any kind of Digital PLL and could use
+different sources of input signal to synchronize to, as well as
+different types of outputs.
+The main interface is NETLINK_GENERIC based protocol with an event
+monitoring multicast group defined.
+
+Device object
+=============
+
+Single dpll device object means single Digital PLL circuit and bunch of
+connected pins.
+It reports the supported modes of operation and current status to the
+user in response to the `do` request of netlink command
+``DPLL_CMD_DEVICE_GET`` and list of dplls registered in the subsystem
+with `dump` netlink request of the same command.
+Changing the configuration of dpll device is done with `do` request of
+netlink ``DPLL_CMD_DEVICE_SET`` command.
+A device handle is ``DPLL_A_ID``, it shall be provided to get or set
+configuration of particular device in the system. It can be obtained
+with a ``DPLL_CMD_DEVICE_GET`` `dump` request or
+a ``DPLL_CMD_DEVICE_ID_GET`` `do` request, where the one must provide
+attributes that result in single device match.
+
+Pin object
+==========
+
+A pin is amorphic object which represents either input or output, it
+could be internal component of the device, as well as externally
+connected.
+The number of pins per dpll vary, but usually multiple pins shall be
+provided for a single dpll device.
+Pin's properties, capabilities and status is provided to the user in
+response to `do` request of netlink ``DPLL_CMD_PIN_GET`` command.
+It is also possible to list all the pins that were registered in the
+system with `dump` request of ``DPLL_CMD_PIN_GET`` command.
+Configuration of a pin can be changed by `do` request of netlink
+``DPLL_CMD_PIN_SET`` command.
+Pin handle is a ``DPLL_A_PIN_ID``, it shall be provided to get or set
+configuration of particular pin in the system. It can be obtained with
+``DPLL_CMD_PIN_GET`` `dump` request or ``DPLL_CMD_PIN_ID_GET`` `do`
+request, where user provides attributes that result in single pin match.
+
+Pin selection
+=============
+
+In general, selected pin (the one which signal is driving the dpll
+device) can be obtained from ``DPLL_A_PIN_STATE`` attribute, and only
+one pin shall be in ``DPLL_PIN_STATE_CONNECTED`` state for any dpll
+device.
+
+Pin selection can be done either manually or automatically, depending
+on hardware capabilities and active dpll device work mode
+(``DPLL_A_MODE`` attribute). The consequence is that there are
+differences for each mode in terms of available pin states, as well as
+for the states the user can request for a dpll device.
+
+In manual mode (``DPLL_MODE_MANUAL``) the user can request or receive
+one of following pin states:
+
+- ``DPLL_PIN_STATE_CONNECTED`` - the pin is used to drive dpll device
+- ``DPLL_PIN_STATE_DISCONNECTED`` - the pin is not used to drive dpll
+ device
+
+In automatic mode (``DPLL_MODE_AUTOMATIC``) the user can request or
+receive one of following pin states:
+
+- ``DPLL_PIN_STATE_SELECTABLE`` - the pin shall be considered as valid
+ input for automatic selection algorithm
+- ``DPLL_PIN_STATE_DISCONNECTED`` - the pin shall be not considered as
+ a valid input for automatic selection algorithm
+
+In automatic mode (``DPLL_MODE_AUTOMATIC``) the user can only receive
+pin state ``DPLL_PIN_STATE_CONNECTED`` once automatic selection
+algorithm locks a dpll device with one of the inputs.
+
+For other dpll device operating modes there is no pin selection
+mechanics.
+
+Shared pins
+===========
+
+A single pin object can be attached to multiple dpll devices.
+Then there are two groups of configuration knobs:
+
+1) Set on a pin - the configuration affects all dpll devices pin is
+ registered to (i.e. ``DPLL_A_PIN_FREQUENCY``),
+2) Set on a pin-dpll tuple - the configuration affects only selected
+ dpll device (i.e. ``DPLL_A_PIN_PRIO``, ``DPLL_A_PIN_STATE``,
+ ``DPLL_A_PIN_DIRECTION``).
+
+MUX-type pins
+=============
+
+A pin can be MUX-type, it aggregates child pins and serves as a pin
+multiplexer. One or more pins are registered with MUX-type instead of
+being directly registered to a dpll device.
+Pins registered with a MUX-type pin provide user with additional nested
+attribute ``DPLL_A_PIN_PARENT`` for each parent they were registered
+with.
+If a pin was registered with multiple parent pins, they behave like a
+multiple output multiplexer. In this case output of a
+``DPLL_CMD_PIN_GET`` would contain multiple pin-parent nested
+attributes with current state related to each parent, like::
+
+ 'pin': [{
+ {'clock-id': 282574471561216,
+ 'module-name': 'ice',
+ 'pin-dpll-caps': 4,
+ 'pin-id': 13,
+ 'pin-parent': [{'pin-id': 2, 'pin-state': 'connected'},
+ {'pin-id': 3, 'pin-state': 'disconnected'}],
+ 'pin-type': 'synce-eth-port'}
+ }]
+
+Only one child pin can provide its signal to the parent MUX-type pin at
+a time, the selection is done by requesting change of a child pin state
+on desired parent, with the use of ``DPLL_A_PIN_PARENT`` nested
+attribute. Example of netlink `set state on parent pin` message format:
+
+ ====================== =============================================
+ ``DPLL_A_PIN_ID`` child pin id
+ ``DPLL_A_PIN_PARENT`` nested attribute for requesting configuration
+ related to parent pin
+ ``DPLL_A_PIN_ID`` parent pin id
+ ``DPLL_A_PIN_STATE`` requested pin state on parent
+ ====================== =============================================
+
+Pin priority
+============
+
+Some devices might offer a capability of automatic pin selection mode
+(enum value ``DPLL_MODE_AUTOMATIC`` of ``DPLL_A_MODE`` attribute).
+Usually, automatic selection is performed on the hardware level, which
+means only pins directly connected to the dpll can be used for automatic
+input pin selection.
+In automatic selection mode, the user cannot manually select a input
+pin for the device, instead the user shall provide all directly
+connected pins with a priority ``DPLL_A_PIN_PRIO``, the device would
+pick a highest priority valid signal and use it to control the DPLL
+device. Example of netlink `set priority on parent pin` message format:
+
+ ===================== =============================================
+ ``DPLL_A_PIN_ID`` child pin id
+ ``DPLL_A_PIN_PARENT`` nested attribute for requesting configuration
+ related to parent pin
+ ``DPLL_A_ID`` parent dpll id
+ ``DPLL_A_PIN_PRIO`` requested pin prio on parent dpll
+ ===================== =============================================
+
+Child pin of MUX-type is not capable of automatic input pin selection,
+in order to configure a input of a MUX-type pin, the user needs to
+request desired pin state of the child pin on the parent pin,
+as described in the ``MUX-type pins`` chapter.
+
+Configuration commands group
+============================
+
+Configuration commands are used to get information about registered
+dpll devices (and pins), as well as set configuration of device or pins.
+As dpll devices must be abstracted and reflect real hardware,
+there is no way to add new dpll device via netlink from user space and
+each device should be registered by its driver.
+
+All netlink commands require ``GENL_ADMIN_PERM``. This is to prevent
+any spamming/DoS from unauthorized userspace applications.
+
+List of netlink commands with possible attributes
+=================================================
+
+All constants identifying command types use a ``DPLL_CMD_`` prefix and
+suffix according to command purpose. All attributes use a ``DPLL_A_``
+prefix and suffix according to attribute purpose:
+
+ ==================================== =================================
+ ``DPLL_CMD_DEVICE_ID_GET`` command to get device ID
+ ``DPLL_A_MODULE_NAME`` attr module name of registerer
+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier
+ (EUI-64), as defined by the
+ IEEE 1588 standard
+ ``DPLL_A_TYPE`` attr type of dpll device
+ ==================================== =================================
+
+ ==================================== =================================
+ ``DPLL_CMD_DEVICE_GET`` command to get device info or
+ dump list of available devices
+ ``DPLL_A_ID`` attr unique dpll device ID
+ ``DPLL_A_MODULE_NAME`` attr module name of registerer
+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier
+ (EUI-64), as defined by the
+ IEEE 1588 standard
+ ``DPLL_A_MODE`` attr selection mode
+ ``DPLL_A_MODE_SUPPORTED`` attr available selection modes
+ ``DPLL_A_LOCK_STATUS`` attr dpll device lock status
+ ``DPLL_A_TEMP`` attr device temperature info
+ ``DPLL_A_TYPE`` attr type of dpll device
+ ==================================== =================================
+
+ ==================================== =================================
+ ``DPLL_CMD_DEVICE_SET`` command to set dpll device config
+ ``DPLL_A_ID`` attr internal dpll device index
+ ``DPLL_A_MODE`` attr selection mode to configure
+ ==================================== =================================
+
+ ==================================== =================================
+ ``DPLL_CMD_PIN_ID_GET`` command to get pin ID
+ ``DPLL_A_MODULE_NAME`` attr module name of registerer
+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier
+ (EUI-64), as defined by the
+ IEEE 1588 standard
+ ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided
+ by registerer
+ ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided
+ by registerer
+ ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided
+ by registerer
+ ``DPLL_A_PIN_TYPE`` attr type of a pin
+ ==================================== =================================
+
+ ==================================== =================================
+ ``DPLL_CMD_PIN_GET`` command to get pin info or dump
+ list of available pins
+ ``DPLL_A_PIN_ID`` attr unique a pin ID
+ ``DPLL_A_MODULE_NAME`` attr module name of registerer
+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier
+ (EUI-64), as defined by the
+ IEEE 1588 standard
+ ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided
+ by registerer
+ ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided
+ by registerer
+ ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided
+ by registerer
+ ``DPLL_A_PIN_TYPE`` attr type of a pin
+ ``DPLL_A_PIN_DIRECTION`` attr direction of a pin
+ ``DPLL_A_PIN_FREQUENCY`` attr current frequency of a pin
+ ``DPLL_A_PIN_FREQUENCY_SUPPORTED`` nested attr provides supported
+ frequencies
+ ``DPLL_A_PIN_ANY_FREQUENCY_MIN`` attr minimum value of frequency
+ ``DPLL_A_PIN_ANY_FREQUENCY_MAX`` attr maximum value of frequency
+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent device
+ the pin is connected with
+ ``DPLL_A_ID`` attr provided if parent is dpll
+ device
+ ``DPLL_A_PIN_PRIO`` attr priority of pin on the
+ dpll device
+ ``DPLL_A_PIN_STATE`` attr state of pin on the parent
+ dpll device
+ ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin
+ the pin is connected with
+ ``DPLL_A_PIN_ID`` attr provided if parent is a pin
+ ``DPLL_A_PIN_STATE`` attr state of pin on the parent
+ pin
+ ``DPLL_A_PIN_DPLL_CAPS`` attr bitmask of pin-dpll
+ capabilities
+ ==================================== =================================
+
+ ==================================== =================================
+ ``DPLL_CMD_PIN_SET`` command to set pins configuration
+ ``DPLL_A_PIN_ID`` attr unique a pin ID
+ ``DPLL_A_PIN_DIRECTION`` attr requested direction of a pin
+ ``DPLL_A_PIN_FREQUENCY`` attr requested frequency of a pin
+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent
+ device configuration of a pin
+ ``DPLL_A_ID`` attr parent dpll device id
+ ``DPLL_A_PIN_PRIO`` attr requested priority of pin on
+ the dpll device
+ ``DPLL_A_PIN_STATE`` attr requested state of pin on
+ the dpll device
+ ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin
+ configuration
+ ``DPLL_A_PIN_ID`` attr parent pin id
+ ``DPLL_A_PIN_STATE`` attr requested state of pin on
+ parent pin
+ ==================================== =================================
+
+Netlink dump requests
+=====================
+
+The ``DPLL_CMD_DEVICE_GET`` and ``DPLL_CMD_PIN_GET`` commands are
+capable of dump type netlink requests, in which case the response is in
+the same format as for their ``do`` request, but every device or pin
+registered in the system is returned.
+
+SET commands format
+===================
+
+``DPLL_CMD_DEVICE_SET`` - to target a dpll device, the user provides
+``DPLL_A_ID``, which is unique identifier of dpll device in the system,
+as well as parameter being configured (``DPLL_A_MODE``).
+
+``DPLL_CMD_PIN_SET`` - to target a pin user has to provide a
+``DPLL_A_PIN_ID``, which is unique identifier of a pin in the system.
+Also configured pin parameters must be added.
+If ``DPLL_A_PIN_DIRECTION`` or ``DPLL_A_PIN_FREQUENCY`` are configured,
+this affects all the dpll device they are connected, that is why those
+attributes shall not be enclosed in ``DPLL_A_PIN_PARENT``.
+Other attributes:
+``DPLL_A_PIN_PRIO`` or ``DPLL_A_PIN_STATE`` must be enclosed in
+``DPLL_A_PIN_PARENT`` as their configuration relates to only one
+parent dpll or parent pin.
+Nested attribute of either ``DPLL_A_ID`` or ``DPLL_A_PIN_ID`` determines
+if configuration was requested on a dpll device or on a pin
+respectively.
+In general, it is possible to configure multiple parameters at once, but
+internally each parameter change will be invoked separately, where order
+of configuration is not guaranteed by any means.
+
+Configuration pre-defined enums
+===============================
+
+.. kernel-doc:: include/uapi/linux/dpll.h
+
+Notifications
+=============
+
+dpll device can provide notifications regarding status changes of the
+device, i.e. lock status changes, input/output changes or other alarms.
+There is one multicast group that is used to notify user-space apps via
+netlink socket: ``DPLL_MCGRP_MONITOR``
+
+Notifications messages:
+
+ ============================== =====================================
+ ``DPLL_CMD_DEVICE_CREATE_NTF`` dpll device was created
+ ``DPLL_CMD_DEVICE_DELETE_NTF`` dpll device was deleted
+ ``DPLL_CMD_DEVICE_CHANGE_NTF`` dpll device has changed
+ ``DPLL_CMD_PIN_CREATE_NTF`` dpll pin was created
+ ``DPLL_CMD_PIN_DELETE_NTF`` dpll pin was deleted
+ ``DPLL_CMD_PIN_CHANGE_NTF`` dpll pin has changed
+ ============================== =====================================
+
+Events format is the same as for the corresponding get command.
+Format of ``DPLL_CMD_DEVICE_`` events is the same as response of
+``DPLL_CMD_DEVICE_GET``.
+Format of ``DPLL_CMD_PIN_`` events is same as response of
+``DPLL_CMD_PIN_GET``.
+
+Device driver implementation
+============================
+
+Device is allocated by dpll_device_get() call. Second call with the
+same arguments will not create new object but provides pointer to
+previously created device for given arguments, it also increases
+refcount of that object.
+Device is deallocated by dpll_device_put() call, which first
+decreases the refcount, once refcount is cleared the object is
+destroyed.
+
+Device should implement set of operations and register device via
+dpll_device_register() at which point it becomes available to the
+users. Multiple driver instances can obtain reference to it with
+dpll_device_get(), as well as register dpll device with their own
+ops and priv.
+
+The pins are allocated separately with dpll_pin_get(), it works
+similar