Linux clock framework development
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From: Johan Hovold <johan@kernel.org>
To: Sibi Sankar <quic_sibis@quicinc.com>
Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	andersson@kernel.org, konrad.dybcio@linaro.org,
	mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, agross@kernel.org,
	conor+dt@kernel.org, quic_tdas@quicinc.com,
	quic_rjendra@quicinc.com, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, neil.armstrong@linaro.org,
	abel.vesa@linaro.org, quic_tsoni@quicinc.com
Subject: Re: [PATCH 2/4] clk: qcom: Add Global Clock controller (GCC) driver for SC8380XP
Date: Fri, 17 Nov 2023 09:13:21 +0100	[thread overview]
Message-ID: <ZVcgoX56q0lYWKyw@hovoldconsulting.com> (raw)
In-Reply-To: <e857c853-51ef-8314-2a21-fa6fd25162ca@quicinc.com>

On Fri, Nov 17, 2023 at 09:26:18AM +0530, Sibi Sankar wrote:
> On 10/25/23 22:10, Bryan O'Donoghue wrote:
> > On 25/10/2023 14:33, Sibi Sankar wrote:

> >> +static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
> >> +    .cmd_rcgr = 0x14018,
> >> +    .mnd_width = 8,
> >> +    .hid_width = 5,
> >> +    .parent_map = gcc_parent_map_9,
> >> +    .freq_tbl = ftbl_gcc_sdcc2_apps_clk_src,
> >> +    .clkr.hw.init = &(const struct clk_init_data) {
> >> +        .name = "gcc_sdcc2_apps_clk_src",
> >> +        .parent_data = gcc_parent_data_9,
> >> +        .num_parents = ARRAY_SIZE(gcc_parent_data_9),
> >> +        .flags = CLK_SET_RATE_PARENT,
> >> +        .ops = &clk_rcg2_floor_ops,
> > 
> > diff sc8280xp..sc8380xp
> > 
> > Here you've used floor instead of shared ops, why is that ?
> 
> We seem to use floor ops for sdcc clks on all other QC SoCs and
> sc8280xp seems to be the exception here. So I'll continue to use floor
> ops for sdcc.

> >> +static struct clk_rcg2 gcc_usb30_mp_mock_utmi_clk_src = {
> >> +    .cmd_rcgr = 0x17158,
> >> +    .mnd_width = 0,
> >> +    .hid_width = 5,
> >> +    .parent_map = gcc_parent_map_0,
> >> +    .freq_tbl = ftbl_gcc_pcie_0_aux_clk_src,
> >> +    .clkr.hw.init = &(const struct clk_init_data) {
> >> +        .name = "gcc_usb30_mp_mock_utmi_clk_src",
> >> +        .parent_data = gcc_parent_data_0,
> >> +        .num_parents = ARRAY_SIZE(gcc_parent_data_0),
> >> +        .flags = CLK_SET_RATE_PARENT,
> >> +        .ops = &clk_rcg2_ops,
> > 
> > This is another discontinuinty with sc8280xp.
> > 
> > Could you have a look through the sc8280xp gcc and do an aduit for 
> > clk_rcg2_shared_ops as against sc8380xp ?
> 
> ack, will do a quick audit before the re-spin.

Please trim unnecessary context from your replies. You quoted some 1400
lines of irrelevant clock structs when all you needed was something like
the above.

Not trimming replies makes it a pain to read your mails and to revisit
threads like this one, for example, in the lore web archives.

Johan

  reply	other threads:[~2023-11-17  8:13 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-25 13:33 [PATCH 0/4] clk: qcom: Introduce clocks drivers for SC8380XP Sibi Sankar
2023-10-25 13:33 ` [PATCH 1/4] dt-bindings: clock: qcom: Add SC8380XP GCC clocks Sibi Sankar
2023-10-27  8:20   ` Krzysztof Kozlowski
2023-10-25 13:33 ` [PATCH 3/4] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for SC8380XP Sibi Sankar
2023-10-27  8:20   ` Krzysztof Kozlowski
2023-10-25 13:33 ` [PATCH 4/4] clk: qcom: rpmh: Add support for SC8380XP rpmh clocks Sibi Sankar
2023-10-25 20:38   ` Bryan O'Donoghue
2023-10-26 11:07   ` Konrad Dybcio
     [not found] ` <20231025133320.4720-3-quic_sibis@quicinc.com>
2023-10-25 16:40   ` [PATCH 2/4] clk: qcom: Add Global Clock controller (GCC) driver for SC8380XP Bryan O'Donoghue
2023-11-17  3:56     ` Sibi Sankar
2023-11-17  8:13       ` Johan Hovold [this message]
2023-11-17 14:24       ` Bryan O'Donoghue
2023-10-26 11:06   ` Konrad Dybcio
2023-10-27  8:21   ` Krzysztof Kozlowski

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