From: Dmitry Osipenko <dmitry.osipenko@collabora.com>
To: Sebastian Reichel <sebastian.reichel@collabora.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org,
Elaine Zhang <zhangqing@rock-chips.com>,
Kever Yang <kever.yang@rock-chips.com>,
Heiko Stuebner <heiko@sntech.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
huangtao@rock-chips.com, andy.yan@rock-chips.com,
devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
kernel@collabora.com
Subject: Re: [PATCH v8 7/7] clk: rockchip: implement proper GATE_LINK support
Date: Wed, 31 Jan 2024 19:10:39 +0300 [thread overview]
Message-ID: <a0f26bfd-5c78-4c5f-9c37-dc1cc3925ede@collabora.com> (raw)
In-Reply-To: <i5qagtdg73rhojifmublx2w2kxvjeisd6qwqbo5vnhrgyedx3i@pyckzpstlnvb>
On 1/30/24 17:47, Sebastian Reichel wrote:
> Hi Dmitry,
>
> On Fri, Jan 26, 2024 at 10:36:13PM +0300, Dmitry Osipenko wrote:
>> On 1/26/24 21:18, Sebastian Reichel wrote:
>>> Recent Rockchip SoCs have a new hardware block called Native Interface
>>> Unit (NIU), which gates clocks to devices behind them. These effectively
>>> need two parent clocks.
>>>
>>> GATE_LINK type clocks handle the second parent via 'linkedclk' by using
>>> runtime PM clocks. To make that possible a new platform device is created
>>> for every clock handled in this way.
>>>
>>> Note, that before this patch clk_rk3588_probe() has never been called,
>>> because CLK_OF_DECLARE marks the DT node as processed. This patch replaces
>>> that with CLK_OF_DECLARE_DRIVER and thus the probe function is used now.
>>> This is necessary to have 'struct device' available.
>>>
>>> Also instead of builtin_platform_driver_probe, the driver has been
>>> switched to use core_initcall, since it should be fully probed before
>>> the Rockchip PM domain driver (and that is using postcore_initcall).
>>
>> Why clk driver needs to be fully probed before PD? The PD driver
>> shouldn't probe until all clk providers that it uses are registered, and
>> then both clk and PD should be registered at the default level.
>
> The error handling in the rockchip PD driver needs rework to
> properly handle -EPROBE_DEFER, which I consider a separate series.
>
> Note, that the driver currently has 'builtin_platform_driver_probe',
> but does not actually probe anything. All clocks are registered via
> CLK_OF_DECLARE, which happens even before core_initcall. So this
> does not make things worse.
>
> Also the OF node is marked as initialized by the early clocks
> (CLK_OF_DECLARE_DRIVER) via the call to of_clk_add_provider(). This
> is necessary, since otherwise the early clocks cannot be referenced
> and we need the early clocks for the timer registration (so it's not
> possible to move all the clocks to late init). This effectively
> results in fw_devlink not working properly. It will tell PM domain
> driver too early, that it may start probing (so a bunch of useless
> -EPROBE_DEFER will happen).
Thanks for the clarification! Definitely will be good to improve the
probe defer handling in the future. And indeed, it can be done
separately from this patchset.
--
Best regards,
Dmitry
next prev parent reply other threads:[~2024-01-31 16:10 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-26 18:18 [PATCH v8 0/7] rockchip: clk: improve GATE_LINK support Sebastian Reichel
2024-01-26 18:18 ` [PATCH v8 1/7] clk: rockchip: rk3588: fix CLK_NR_CLKS usage Sebastian Reichel
2024-01-26 18:18 ` [PATCH v8 2/7] dt-bindings: clock: rk3588: drop CLK_NR_CLKS Sebastian Reichel
2024-01-26 18:18 ` [PATCH v8 3/7] dt-bindings: clock: rk3588: add missing PCLK_VO1GRF Sebastian Reichel
2024-01-26 18:18 ` [PATCH v8 4/7] clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf Sebastian Reichel
2024-01-26 18:18 ` [PATCH v8 5/7] clk: rockchip: rk3588: fix indent Sebastian Reichel
2024-01-26 18:18 ` [PATCH v8 6/7] clk: rockchip: rk3588: use linked clock ID for GATE_LINK Sebastian Reichel
2024-01-26 18:18 ` [PATCH v8 7/7] clk: rockchip: implement proper GATE_LINK support Sebastian Reichel
2024-01-26 19:36 ` Dmitry Osipenko
2024-01-30 14:47 ` Sebastian Reichel
2024-01-31 16:10 ` Dmitry Osipenko [this message]
2024-02-16 17:15 ` [PATCH v8 0/7] rockchip: clk: improve " Sebastian Reichel
2024-02-27 21:16 ` (subset) " Heiko Stuebner
2024-02-27 21:28 ` Heiko Stuebner
[not found] <1456131709882456@mail.yandex.ru>
2024-03-08 13:27 ` [PATCH v8 7/7] clk: rockchip: implement proper " Sebastian Reichel
[not found] ` <20561709904626@c6cdvt45gvthiay5.myt.yp-c.yandex.net>
2024-03-08 13:59 ` Sebastian Reichel
2024-03-17 23:34 ` Chad LeClair
2024-03-20 16:36 ` Sebastian Reichel
2024-03-20 17:20 ` Ilya K
2024-03-21 2:50 ` Chad LeClair
2024-03-21 18:31 ` Sebastian Reichel
2024-03-21 19:01 ` Ilya K
2024-03-21 20:45 ` Sebastian Reichel
2024-03-22 0:57 ` Chad LeClair
2024-03-22 7:06 ` Ilya K
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