From: Vyacheslav Yurkov <uvv.mail@gmail.com>
To: Brian Masney <bmasney@redhat.com>, V.Yurkov.EXT@bruker.com
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 1/2] dt-bindings: Add GPIO-locked fixed clock
Date: Tue, 16 Jun 2026 16:02:58 +0200 [thread overview]
Message-ID: <a19f981a-01ea-4477-b443-2fee69f226df@gmail.com> (raw)
In-Reply-To: <ajB2PhmxvdtsXNnm@redhat.com>
Hi Brian
On 16.06.2026 00:01, Brian Masney wrote:
> Hi Vyacheslav,
>
> On Wed, Jun 03, 2026 at 11:16:42AM +0000, Vyacheslav Yurkov via B4 Relay wrote:
>> From: Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
>>
>> Some hardware designs provide fixed-frequency clocks generated outside
>> software control, such as by FPGA-resident PLLs. While the clock rate is
>> fixed, a separate GPIO signal indicates whether the clock source is
>> locked and producing a valid output.
>>
>> Describe a GPIO-locked fixed clock provider that exposes a fixed-rate
>> clock whose availability depends on one or more GPIO lock-status
>> signals.
>>
>> Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
>> Signed-off-by: Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
>> ---
>> .../bindings/clock/gpio-locked-fixed-clock.yaml | 70 ++++++++++++++++++++++
>> 1 file changed, 70 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/gpio-locked-fixed-clock.yaml b/Documentation/devicetree/bindings/clock/gpio-locked-fixed-clock.yaml
>> new file mode 100644
>> index 000000000000..9106b800b673
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/gpio-locked-fixed-clock.yaml
>> @@ -0,0 +1,70 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/gpio-locked-fixed-clock.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: GPIO Locked Fixed Clock
>> +
>> +maintainers:
>> + - Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
>> +
>> +description: |
>> + Provides a clock output whose availability depends on a set of
>> + prerequisite conditions. These conditions include the presence of
>> + one or more parent clocks and the asserted state of one or more
>> + GPIO lock indicators. An example of such clocks is FPGA clock that
>> + are outside CPU control, with the lock status exposed through GPIO
>> + signal.
>> +
>> + The output clock is considered available only when all configured
>> + prerequisites are satisfied.
>
> I'm stepping outside my usual review of just the clk drivers. Krzysztof
> in v1 and v2 asked for more detailed hardware explanation. This feels to
> me like this is a policy that says to not use these clocks until the
> GPIO says they are ready. My gut feeling is that details like this
> should live in a clk driver instead of a dt-binding.
>
> Alternatively, if this is generic enough, then could
> Documentation/devicetree/bindings/clock/gated-fixed-clock.yaml be
> extended?
>
> Brian
Does it mean I should drop driver description from the DT schema?
So you are implying that gated-fixed-clock.yaml can be extended with
another compatibility string? When another compatibility string is used,
then some other bindings are expected by the driver, not what is used by
gated-fixed-clock driver. Is that a common pattern among dt-bindings to
share the bindings between different compatibility strings?
Slava
next prev parent reply other threads:[~2026-06-16 14:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-03 11:16 [PATCH v3 0/2] A proposal to add a gpio-locked fixed clock driver Vyacheslav Yurkov via B4 Relay
2026-06-03 11:16 ` [PATCH v3 1/2] dt-bindings: Add GPIO-locked fixed clock Vyacheslav Yurkov via B4 Relay
2026-06-15 22:01 ` Brian Masney
2026-06-16 14:02 ` Vyacheslav Yurkov [this message]
2026-06-16 15:39 ` Conor Dooley
2026-06-03 11:16 ` [PATCH v3 2/2] clk: Add gpio-locked fixed clock driver Vyacheslav Yurkov via B4 Relay
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