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From: Scott Branden <scott.branden@broadcom.com>
To: Mark Rutland <mark.rutland@arm.com>,
	Anup Patel <anup.patel@broadcom.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>, Ray Jui <rjui@broadcom.com>,
	Scott Branden <sbranden@broadcom.com>,
	Jon Mason <jonmason@broadcom.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Oza Pawandeep <oza.oza@broadcom.com>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Pramod Kumar <pramod.kumar@broadcom.com>,
	Sandeep Tripathy <sandeep.tripathy@broadcom.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com
Subject: Re: [PATCH v2 04/11] arm64: dts: Initial DTS files for Broadcom Stingray SOC
Date: Mon, 15 May 2017 09:04:20 -0700	[thread overview]
Message-ID: <a8ada733-b1a0-b038-78da-e59de76c106c@broadcom.com> (raw)
In-Reply-To: <20170515131334.GE17776@leverpostej>



On 17-05-15 06:13 AM, Mark Rutland wrote:
> Hi,
>
> On Mon, May 15, 2017 at 05:32:14PM +0530, Anup Patel wrote:
>> +/ {
>> +	chosen { /* Default kernel args */
>> +		bootargs = "root=/dev/ram rw rootwait \
>> +			    earlycon=uart8250,mmio32,0x68a10000 \
>> +			    pci=pcie_bus_safe cma=64M";
>
> Why do we need all of these?
Agreed - we don't need the default kernels args here - they are passed 
in by bootloader as needed.
>
>> +		linux,stdout-path = "serial0:115200n8";
>
> Please drop the 'linux,' prefix here.
>
> [...]
>
>> +	memory: memory@80000000 {
>> +		device_type = "memory";
>> +		reg = <0x00000000 0x80000000 0 0x40000000>;
>> +	};
>> +
>> +	psci {
>> +		compatible = "arm,psci-0.2";
>> +		method = "smc";
>> +	};
>> +
>> +	pmu {
>> +		compatible = "arm,armv8-pmuv3";
>> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
>> +	};
>> +
>> +	timer {
>> +		compatible = "arm,armv8-timer";
>> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) |
>> +			      IRQ_TYPE_LEVEL_LOW)>,
>> +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) |
>> +			      IRQ_TYPE_LEVEL_LOW)>,
>> +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) |
>> +			      IRQ_TYPE_LEVEL_LOW)>,
>> +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) |
>> +			      IRQ_TYPE_LEVEL_LOW)>;
>
> GICv3 PPIs don't have a mask. See
>
> Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
>
> Please remove the GIC_CPU_MASK_*() uses here and in this dts. They
> shouldn't be there.
>
> Thanks,
> Mark.
>

  reply	other threads:[~2017-05-15 16:04 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-15 12:02 [PATCH v2 00/11] Broadcom Stingray SOC Initial Support Anup Patel
2017-05-15 12:02 ` [PATCH v2 01/11] dt-bindings: bcm: Add Broadcom Stingray bindings document Anup Patel
2017-05-15 12:02 ` [PATCH v2 02/11] dt-bindings: clk: Extend binding doc for Stingray SOC Anup Patel
2017-05-15 12:02 ` [PATCH v2 03/11] clk: bcm: Add clocks " Anup Patel
2017-05-15 12:02 ` [PATCH v2 04/11] arm64: dts: Initial DTS files for Broadcom " Anup Patel
2017-05-15 13:13   ` Mark Rutland
2017-05-15 16:04     ` Scott Branden [this message]
2017-05-16 10:47     ` Anup Patel
2017-05-15 12:02 ` [PATCH v2 05/11] arm64: dts: Add clock DT nodes for " Anup Patel
2017-05-15 12:02 ` [PATCH v2 06/11] arm64: dts: Add NAND " Anup Patel
2017-05-15 12:02 ` [PATCH v2 07/11] arm64: dts: Add pinctrl " Anup Patel
2017-05-15 12:02 ` [PATCH v2 08/11] arm64: dts: Add GPIO " Anup Patel
2017-05-15 12:02 ` [PATCH v2 09/11] arm64: dts: Add I2C DT nodes for Stingray SoC Anup Patel
2017-05-15 12:02 ` [PATCH v2 10/11] arm64: dts: Add PL022, PL330 and SP805 DT nodes for Stingray Anup Patel
2017-05-15 12:02 ` [PATCH v2 11/11] arm64: dts: Add PWM and SDHCI DT nodes for Stingray SOC Anup Patel

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