Linux clock framework development
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From: Yao Zi <ziyao@disroot.org>
To: Binbin Zhou <zhoubb.aaron@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Huacai Chen <chenhuacai@kernel.org>,
	WANG Xuerui <kernel@xen0n.name>, Yinbo Zhu <zhuyinbo@loongson.cn>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, loongarch@lists.linux.dev,
	Mingcong Bai <jeffbai@aosc.io>,
	Kexy Biscuit <kexybiscuit@aosc.io>
Subject: Re: [PATCH 1/8] dt-bindings: clock: Document Loongson 2K0300 clock controller
Date: Fri, 23 May 2025 13:28:45 +0000	[thread overview]
Message-ID: <aDB4DTd1Y29lJlyM@pie.lan> (raw)
In-Reply-To: <CAMpQs4JRy+Q2D5B9cOLyuD=8EcWNqqyhJcm+X5wiqTgjy5cikA@mail.gmail.com>

On Fri, May 23, 2025 at 08:30:57PM +0800, Binbin Zhou wrote:
> On Fri, May 23, 2025 at 6:46 PM Yao Zi <ziyao@disroot.org> wrote:
> >
> > Document the clock controller shipped in Loongson 2K0300 SoC, which
> > generates various clock signals for SoC peripherals.
> >
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> >  .../bindings/clock/loongson,ls2k0300-clk.yaml | 52 ++++++++++++++++++
> >  .../dt-bindings/clock/loongson,ls2k0300-clk.h | 54 +++++++++++++++++++
> >  2 files changed, 106 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/loongson,ls2k0300-clk.yaml
> 
> I don't think a new binding file for 2K0300 is needed. Adding
> compatible entries to loongson,ls2k-clk.yaml would be more appropriate
> as they are almost all similar.

Originally I've tried to integrate the 2K0300 stuff with
loongson,ls2k-clk.yaml, but found it's hard to describe some properties.

For example, currently in loongson,ls2k-clk.yaml, the clocks property is
described as

  clocks:
    items:
      - description: 100m ref

what should the description look like with 2K0300 introduced, whose
reference clock runs at 120MHz instead of 100MHz? It'll be hard to
describe things correctly without losing existing information. "120MHz
reference clock for Loongson 2K0300, or 100MHz reference clock for other
SoCs" sounds even a worse idea.

Another example is about the description of clock IDs. loongson,ls2k-clk.yaml
describes available clock IDs as

  '#clock-cells':
    const: 1
    description:
      The clock consumer should specify the desired clock by having the clock
      ID in its "clocks" phandle cell. See include/dt-bindings/clock/loongson,ls2k-clk.h
      for the full list of Loongson-2 SoC clock IDs.

what should the description look like if we add 2K0300 support? With a
different header being introduced, the description will be messy.

I think keeping SoCs peripherals that are different in hardware design
in the same binding is really a bad idea. Yes, these clock controllers
are similar enough to reuse the clock hardware driver, but they have
different clock tree structures and register definitions, making them
essentially different things. Trying to keep everything in the same
place only makes the binding messy.

For the reason to introduce a new binding header: loongson,ls2k-clk.h
contains clocks that aren't present in 2K0300 and misses IDs for ones
present. It's just messy if we mix everything in the same place, so here
comes loongson,ls2k0300-clk.h.

Thanks,
Yao Zi

  reply	other threads:[~2025-05-23 13:29 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-23 10:45 [PATCH 0/8] Add clock support for Loongson 2K0300 SoC Yao Zi
2025-05-23 10:45 ` [PATCH 1/8] dt-bindings: clock: Document Loongson 2K0300 clock controller Yao Zi
2025-05-23 11:37   ` Krzysztof Kozlowski
2025-05-23 12:30   ` Binbin Zhou
2025-05-23 13:28     ` Yao Zi [this message]
2025-05-26  4:11       ` Krzysztof Kozlowski
2025-05-26  4:17         ` Yao Zi
2025-05-26  2:33     ` Yanteng Si
2025-05-23 10:45 ` [PATCH 2/8] clk: loongson2: Allow specifying clock flags for gate clock Yao Zi
2025-05-23 10:45 ` [PATCH 3/8] clk: loongson2: Support scale clocks with an alternative mode Yao Zi
2025-05-23 10:45 ` [PATCH 4/8] clk: loongson2: Allow zero divisors for dividers Yao Zi
2025-05-23 10:45 ` [PATCH 5/8] clk: loongson2: Avoid hardcoding firmware name of the reference clock Yao Zi
2025-05-23 10:45 ` [PATCH 6/8] clk: loongson2: Add clock definitions for Loongson 2K0300 SoC Yao Zi
2025-05-23 10:45 ` [PATCH 7/8] LoongArch: dts: Add clock tree for Loongson 2K0300 Yao Zi
2025-05-23 10:45 ` [PATCH 8/8] LoongArch: dts: Remove clock-frquency from UART0 of CTCISZ Forever Pi Yao Zi

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