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Wysocki" , Mika Westerberg , Linus Walleij , Bartosz Golaszewski , Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , Palmer Dabbelt , Paul Walmsley , Len Brown , Rahul Pathak , Leyfoon Tan , Atish Patra , Andrew Jones , Samuel Holland , Anup Patel , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 17/23] ACPI: RISC-V: Create interrupt controller list in sorted order Message-ID: References: <20250525084710.1665648-1-apatel@ventanamicro.com> <20250525084710.1665648-18-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, May 28, 2025 at 02:05:36PM +0300, Andy Shevchenko wrote: > On Sun, May 25, 2025 at 02:17:04PM +0530, Anup Patel wrote: > > > > Currently, the interrupt controller list is created without any order. > > Create the list sorted with the GSI base of the interrupt controllers. > > ... > > > - list_add_tail(&ext_intc_element->list, &ext_intc_list); > > + if (list_empty(&ext_intc_list)) { > > + list_add(&ext_intc_element->list, &ext_intc_list); > > + return 0; > > + } > > With the below done the above can be optimized (hopefully). > > > + list_for_each_entry(node, &ext_intc_list, list) { > > + if (node->gsi_base < ext_intc_element->gsi_base) > > + break; > > + } > > + > > + __list_add(&ext_intc_element->list, node->list.prev, &node->list); > > Is this reimplementation of list_add_tail()? And why list debug is excluded here? > Sure. Let me use list_add_tail() itself in the next revision. However, I didn't understand the list debug question. IIUC, list_add_tail() is a wrapper around __list_add() and doesn't exclude the list debug, right? Thanks! Sunil