From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: linux-clk@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH] clk: renesas: cpg-mssr: Read back reset registers to assure values latched
Date: Thu, 18 Sep 2025 08:08:56 +0200 [thread overview]
Message-ID: <aMuh-K8d_d2GETga@shikoro> (raw)
In-Reply-To: <20250918030723.331634-1-marek.vasut+renesas@mailbox.org>
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Hi Marek,
thanks for your hard work on the PCIe issue.
> /* Reset module */
> writel(bitmask, priv->pub.base0 + priv->reset_regs[reg]);
> + readl(priv->pub.base0 + priv->reset_regs[reg]);
Maybe it makes sense to introduce a light helper function
'writel_with_latch' or something?
a) we can have a central documentation point to describe why this is
needed and for which registers
b) this makes it hopefully more likely that future additions will use
the helper right away and not forget to latch their access
Opinions?
Happy hacking,
Wolfram
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next prev parent reply other threads:[~2025-09-18 6:08 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-18 3:06 [PATCH] clk: renesas: cpg-mssr: Read back reset registers to assure values latched Marek Vasut
2025-09-18 6:08 ` Wolfram Sang [this message]
2025-09-18 13:38 ` Marek Vasut
2025-09-18 11:11 ` Lad, Prabhakar
2025-09-18 13:42 ` Marek Vasut
2025-09-18 15:05 ` Lad, Prabhakar
2025-09-18 23:16 ` Marek Vasut
2025-09-19 8:23 ` Lad, Prabhakar
2025-09-22 11:22 ` Geert Uytterhoeven
2025-09-22 13:57 ` Wolfram Sang
2025-09-22 14:08 ` Geert Uytterhoeven
2025-09-22 14:23 ` Wolfram Sang
2025-09-19 7:21 ` Geert Uytterhoeven
2025-09-19 8:22 ` Lad, Prabhakar
2025-09-19 12:19 ` Marek Vasut
2025-09-22 6:45 ` Geert Uytterhoeven
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