From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
To: Rob Herring <robh@kernel.org>
Cc: tomm.merciai@gmail.com, geert@linux-m68k.org,
laurent.pinchart@ideasonboard.com,
linux-renesas-soc@vger.kernel.org, biju.das.jz@bp.renesas.com,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 09/20] dt-bindings: display: renesas,rzg2l-du: Add support for RZ/G3E SoC
Date: Thu, 12 Feb 2026 15:36:09 +0100 [thread overview]
Message-ID: <aY3lWbxr08F8kGxS@tom-desktop> (raw)
In-Reply-To: <20260210001108.GA2165386-robh@kernel.org>
Hi Rob,
Thanks for your review.
On Mon, Feb 09, 2026 at 06:11:08PM -0600, Rob Herring wrote:
> On Mon, Feb 02, 2026 at 12:57:40PM +0100, Tommaso Merciai wrote:
> > The RZ/G3E Soc has 2 LCD controller (LCDC), contain a Frame Compression
> > Processor (FCPVD), a Video Signal Processor (VSPD), Video Signal
> > Processor (VSPD), and Display Unit (DU).
> >
> > - LCDC0 supports DSI and LVDS (single or dual-channel) outputs.
> > - LCDC1 supports DSI, LVDS (single-channel), and RGB outputs.
> >
> > Add new SoC-specific compatible string 'renesas,r9a09g047-du'.
> >
> > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
> > ---
> > v1->v2:
> > - Use single compatible string instead of multiple compatible strings
> > for the two DU instances, leveraging a 'renesas,id' property to
> > differentiate between DU0 and DU1.
> > - Updated commit message accordingly.
> >
> > v2->v3:
> > - No changes.
> >
> > v3->v4:
> > - No changes.
> >
> > .../bindings/display/renesas,rzg2l-du.yaml | 54 +++++++++++++++++++
> > 1 file changed, 54 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> > index 2cc66dcef870..55e3fcff7030 100644
> > --- a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> > +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> > @@ -20,6 +20,7 @@ properties:
> > - enum:
> > - renesas,r9a07g043u-du # RZ/G2UL
> > - renesas,r9a07g044-du # RZ/G2{L,LC}
> > + - renesas,r9a09g047-du # RZ/G3E
> > - renesas,r9a09g057-du # RZ/V2H(P)
> > - items:
> > - enum:
> > @@ -53,6 +54,12 @@ properties:
> > power-domains:
> > maxItems: 1
> >
> > + renesas,id:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + enum: [0, 1]
> > + description: |
> > + DU instance number.
>
> If we wanted instance numbers, there would be a common property. So why
> is this needed? What's the difference between instances besides the
> ports?
renesas,id was introduce because:
- LCDC0 supports DSI and LVDS (single or dual-channel) outputs.
- LCDC1 supports DSI, LVDS (single-channel), and RGB outputs.
I will model the hardware without renesas,id.
I just used renesas,id because of the above reason.
Kind Regards,
Tommaso
>
> Rob
next prev parent reply other threads:[~2026-02-12 14:36 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 11:57 [PATCH v4 00/20] Add support for DU and DSI on the Renesas RZ/G3E SoC Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 01/20] clk: renesas: rzv2h: Add PLLDSI clk mux support Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 02/20] clk: renesas: r9a09g047: Add CLK_PLLETH_LPCLK support Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 03/20] clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1} clocks Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 04/20] clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_DIV7 clocks Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 05/20] clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_CSDIV clocks Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 06/20] clk: renesas: r9a09g047: Add support for SMUX2_DSI{0,1}_CLK Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 07/20] clk: renesas: r9a09g047: Add support for DSI clocks and resets Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 08/20] clk: renesas: r9a09g047: Add support for LCDC{0,1} " Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 09/20] dt-bindings: display: renesas,rzg2l-du: Add support for RZ/G3E SoC Tommaso Merciai
2026-02-10 0:11 ` Rob Herring
2026-02-12 14:36 ` Tommaso Merciai [this message]
2026-02-02 11:57 ` [PATCH v4 10/20] dt-bindings: display: bridge: renesas,dsi: " Tommaso Merciai
2026-02-10 0:18 ` Rob Herring (Arm)
2026-02-02 11:57 ` [PATCH v4 11/20] drm: renesas: rz-du: mipi_dsi: Add out_port to OF data Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 12/20] drm: renesas: rz-du: mipi_dsi: Add RZ_MIPI_DSI_FEATURE_GPO0R feature Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 13/20] drm: renesas: rz-du: mipi_dsi: Add support for RZ/G3E Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 14/20] drm: renesas: rz-du: Add RZ/G3E support Tommaso Merciai
2026-02-09 12:28 ` Lad, Prabhakar
2026-02-02 11:57 ` [PATCH v4 15/20] media: dt-bindings: media: renesas,vsp1: Document RZ/G3E Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 16/20] media: dt-bindings: media: renesas,fcp: Document RZ/G3E SoC Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 17/20] arm64: dts: renesas: r9a09g047: Add fcpvd{0,1} nodes Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 18/20] arm64: dts: renesas: r9a09g047: Add vspd{0,1} nodes Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 19/20] arm64: dts: renesas: r9a09g047: Add DU{0,1} and DSI nodes Tommaso Merciai
2026-02-02 11:57 ` [PATCH v4 20/20] arm64: dts: renesas: r9a09g047e57-smarc: Enable DU1 and DSI support Tommaso Merciai
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