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From: Brian Masney <bmasney@redhat.com>
To: David Laight <david.laight.linux@gmail.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Claudiu Beznea <claudiu.beznea@tuxon.dev>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	kernel test robot <lkp@intel.com>
Subject: Re: [PATCH 1/3] clk: microchip: core: update to use div64_ul() instead of do_div()
Date: Tue, 24 Feb 2026 11:56:03 -0500	[thread overview]
Message-ID: <aZ3YI2eyyYLWl-dy@redhat.com> (raw)
In-Reply-To: <20260223090948.7970ca87@pumpkin>

Hi David,

On Mon, Feb 23, 2026 at 09:09:48AM +0000, David Laight wrote:
> On Sun, 22 Feb 2026 18:51:04 -0500
> Brian Masney <bmasney@redhat.com> wrote:
> 
> > This driver is currently only compiled on 32-bit MIPS systems. When
> > compiling on 64-bit systems, the build fails with:
> > 
> >     WARNING: do_div() does a 64-by-32 division, please consider using
> >     div64_ul instead.
> > 
> > Let's update this to use div64_ul() in preparation for allowing this
> > driver to be compiled on all architectures.
> 
> There are a log of 'long' in that code that hold clock frequencies.
> I suspect they should be u32 (I think someone was scared that int might be 16bit).

Instead of calling:

    do_div(frac, rate);

Where frac is a u64, and rate is an unsigned long, I could just cast the
rate to a u32 like this:

    do_div(frac, (u32) rate);

Thoughts?

Brian


> 
> > 
> > Reported-by: kernel test robot <lkp@intel.com>
> > Closes: https://lore.kernel.org/oe-kbuild-all/202601160758.bpkN4546-lkp@intel.com/
> > Signed-off-by: Brian Masney <bmasney@redhat.com>
> > ---
> >  drivers/clk/microchip/clk-core.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/clk/microchip/clk-core.c b/drivers/clk/microchip/clk-core.c
> > index 692152b5094e00bf5acb19a67cf41e6c86b11f35..2e86ad846a66cd5487f5412c09ab0ad25ebe3f79 100644
> > --- a/drivers/clk/microchip/clk-core.c
> > +++ b/drivers/clk/microchip/clk-core.c
> > @@ -341,7 +341,7 @@ static void roclk_calc_div_trim(unsigned long rate,
> >  		div = parent_rate / (rate << 1);
> >  		frac = parent_rate;
> >  		frac <<= 8;
> > -		do_div(frac, rate);
> > +		frac = div64_ul(frac, rate);
> >  		frac -= (u64)(div << 9);
> 
> Is that cast in the right place?
> I suspect 'div' can't be large enough to need it, but it's presence makes
> my wonder ...
> 
> 	David
> 
> >  
> >  		rodiv = (div > REFO_DIV_MASK) ? REFO_DIV_MASK : div;
> > 
> 


  reply	other threads:[~2026-02-24 16:56 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-22 23:51 [PATCH 0/3] clk: microchip: core: allow driver to be compiled with COMPILE_TEST Brian Masney
2026-02-22 23:51 ` [PATCH 1/3] clk: microchip: core: update to use div64_ul() instead of do_div() Brian Masney
2026-02-23  9:09   ` David Laight
2026-02-24 16:56     ` Brian Masney [this message]
2026-02-24 22:50       ` David Laight
2026-02-22 23:51 ` [PATCH 2/3] clk: microchip: core: change asm nop calls to nop() Brian Masney
2026-02-22 23:51 ` [PATCH 3/3] clk: microchip: core: allow driver to be compiled with COMPILE_TEST Brian Masney
2026-02-24 17:10 ` [PATCH 0/3] " Conor Dooley
2026-02-24 17:27   ` Brian Masney
2026-02-24 17:36     ` Conor Dooley
2026-02-24 17:43       ` Brian Masney

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