Re: [PATCH v2 3/3] clk: renesas: r9a06g032: Enable watchdog reset sources

[Wolfram Sang <wsa+renesas@sang-engineering.com>]

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Hi Herve,

On Fri, Mar 13, 2026 at 10:24:16AM +0100, Herve Codina (Schneider Electric) wrote:
> The watchdog timeout is signaled using an interrupt and, on this
> interrupt, a software initiated reset is performed.
> 
> This software initiated reset performs, in the end, a hardware system
> reset using SWRST_REQ of RSTCTRL register.
> 
> The watchdog itself is able to control directly the hardware system
> reset without any operation done by the interrupt handler. This feature
> allows the watchdog to not depend on the software to reset the system
> when a watchdog timeout occurs.
> 
> Indeed, when the watchdog timeout occurs, the watchdog requests a system
> reset using its own hardware dedicated line but this reset source is
> disabled at the reset controller level.
> 
> To benefit of this feature and be robust against software issues, enable
> watchdogs reset sources.
> 
> Suggested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@bootlin.com>

Yes, much more elegant than v1, I think:

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

> +	/* Allow software reset and watchdog resets */
> +	writel(R9A06G032_SYSCTRL_SWRST | R9A06G032_SYSCTRL_RSTEN_MRESET_EN |

Super minor nit: I would swap this line...

> +	       R9A06G032_SYSCTRL_WDA7RST_0 | R9A06G032_SYSCTRL_WDA7RST_1,

... with this one. Feels more ordered if MRESET_EN is last. But I don't
insist.

This patch should have been sent seperately, though, IMHO. Mixing
watchdog and clock patches without a dependency only calls for unneeded
negotiations of involved subsystem maintainers.

Thanks for the series,

   Wolfram


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