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[73.183.52.120]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8d2a8c29f00sm427002585a.45.2026.04.03.07.22.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Apr 2026 07:22:02 -0700 (PDT) Date: Fri, 3 Apr 2026 10:21:59 -0400 From: Brian Masney To: Yu-Chun Lin Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de, cylee12@realtek.com, afaerber@suse.com, jyanchou@realtek.com, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-realtek-soc@lists.infradead.org, james.tai@realtek.com, cy.huang@realtek.com, stanley_chang@realtek.com Subject: Re: [PATCH v6 03/10] clk: realtek: Introduce a common probe() Message-ID: References: <20260402073957.2742459-1-eleanor.lin@realtek.com> <20260402073957.2742459-4-eleanor.lin@realtek.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260402073957.2742459-4-eleanor.lin@realtek.com> User-Agent: Mutt/2.3.0 (2026-01-25) Hi Cheng-Yu, On Thu, Apr 02, 2026 at 03:39:50PM +0800, Cheng-Yu Lee wrote: > Add rtk_clk_probe() to set up the shared regmap, register clock hardware, > and add the clock provider. > > Additionally, if the "#reset-cells" property is present in the device tree, > it creates and registers an auxiliary device using the provided aux_name. > This allows the dedicated reset driver to bind to this device, enabling > both clock and reset drivers to share the same regmap. > > Signed-off-by: Cheng-Yu Lee > Co-developed-by: Yu-Chun Lin > Signed-off-by: Yu-Chun Lin > --- > Changes in v6: > - Replace direct reset controller initialization with auxiliary device creation. > - Add aux_name parameter to rtk_clk_probe() to register the reset auxiliary device. > - Simplify rtk_clk_desc because reset data is handled entirely by the auxiliary reset driver. > - In Kconfig, change "depends on RESET_CONTROLLER" to "select RESET_CONTROLLER" > - Remove unused includes headers and added . > --- > MAINTAINERS | 1 + > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/realtek/Kconfig | 28 +++++++++++++++ > drivers/clk/realtek/Makefile | 4 +++ > drivers/clk/realtek/common.c | 67 ++++++++++++++++++++++++++++++++++++ > drivers/clk/realtek/common.h | 37 ++++++++++++++++++++ > 7 files changed, 139 insertions(+) > create mode 100644 drivers/clk/realtek/Kconfig > create mode 100644 drivers/clk/realtek/Makefile > create mode 100644 drivers/clk/realtek/common.c > create mode 100644 drivers/clk/realtek/common.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 8f355896583b..8318156a02b5 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -22240,6 +22240,7 @@ L: devicetree@vger.kernel.org > L: linux-clk@vger.kernel.org > S: Supported > F: Documentation/devicetree/bindings/clock/realtek* > +F: drivers/clk/realtek/* > F: drivers/reset/realtek/* > F: include/dt-bindings/clock/realtek* > F: include/dt-bindings/reset/realtek* > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index 3d803b4cf5c1..d60f6415b0a3 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -519,6 +519,7 @@ source "drivers/clk/nuvoton/Kconfig" > source "drivers/clk/pistachio/Kconfig" > source "drivers/clk/qcom/Kconfig" > source "drivers/clk/ralink/Kconfig" > +source "drivers/clk/realtek/Kconfig" > source "drivers/clk/renesas/Kconfig" > source "drivers/clk/rockchip/Kconfig" > source "drivers/clk/samsung/Kconfig" > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index f7bce3951a30..69b84d1e7bcc 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -140,6 +140,7 @@ obj-$(CONFIG_COMMON_CLK_PISTACHIO) += pistachio/ > obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ > obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ > obj-y += ralink/ > +obj-$(CONFIG_COMMON_CLK_REALTEK) += realtek/ > obj-y += renesas/ > obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ > obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ > diff --git a/drivers/clk/realtek/Kconfig b/drivers/clk/realtek/Kconfig > new file mode 100644 > index 000000000000..bc47d3f1c452 > --- /dev/null > +++ b/drivers/clk/realtek/Kconfig > @@ -0,0 +1,28 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +config COMMON_CLK_REALTEK > + bool "Clock driver for Realtek SoCs" > + depends on ARCH_REALTEK || COMPILE_TEST > + default ARCH_REALTEK > + help > + Enable the common clock framework infrastructure for Realtek > + system-on-chip platforms. > + > + This provides the base support required by individual Realtek > + clock controller drivers to expose clocks to peripheral devices. > + > + If you have a Realtek-based platform, say Y. > + > +if COMMON_CLK_REALTEK > + > +config RTK_CLK_COMMON > + tristate "Realtek Clock Common" > + select RESET_CONTROLLER > + select RESET_RTK_COMMON select AUXILIARY_BUS ? > + help > + Common helper code shared by Realtek clock controller drivers. > + > + This provides utility functions and data structures used by > + multiple Realtek clock implementations, and include integration > + with reset controllers where required. > + > +endif > diff --git a/drivers/clk/realtek/Makefile b/drivers/clk/realtek/Makefile > new file mode 100644 > index 000000000000..377ec776ee47 > --- /dev/null > +++ b/drivers/clk/realtek/Makefile > @@ -0,0 +1,4 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +obj-$(CONFIG_RTK_CLK_COMMON) += clk-rtk.o > + > +clk-rtk-y += common.o > diff --git a/drivers/clk/realtek/common.c b/drivers/clk/realtek/common.c > new file mode 100644 > index 000000000000..c5aea15a3714 > --- /dev/null > +++ b/drivers/clk/realtek/common.c > @@ -0,0 +1,67 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (C) 2019 Realtek Semiconductor Corporation If you are making changes here, should the copyrights be updated to include 2026? > + * Author: Cheng-Yu Lee > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include "common.h" > + > +static int rtk_reset_controller_register(struct device *dev, const char *aux_name) > +{ > + struct auxiliary_device *adev; > + > + if (!of_property_present(dev->of_node, "#reset-cells")) > + return 0; > + > + adev = devm_auxiliary_device_create(dev, aux_name, NULL); > + > + if (IS_ERR(adev)) > + return PTR_ERR(adev); > + return 0; Add newline before return. > +} > + > +int rtk_clk_probe(struct platform_device *pdev, const struct rtk_clk_desc *desc, > + const char *aux_name) > +{ > + int i, ret; > + struct regmap *regmap; > + struct device *dev = &pdev->dev; Put variables in reverse Christmas tree order. > + > + regmap = device_node_to_regmap(pdev->dev.of_node); > + if (IS_ERR(regmap)) > + return dev_err_probe(dev, PTR_ERR(regmap), "failed to get regmap\n"); > + > + for (i = 0; i < desc->num_clks; i++) > + desc->clks[i]->regmap = regmap; > + > + for (i = 0; i < desc->clk_data->num; i++) { > + struct clk_hw *hw = desc->clk_data->hws[i]; > + > + if (!hw) > + continue; > + > + ret = devm_clk_hw_register(dev, hw); > + > + if (ret) { Remove newline before if. > + dev_warn(dev, "failed to register hw of clk%d: %d\n", i, > + ret); > + desc->clk_data->hws[i] = NULL; This chunk doesn't take into account probe deferrals. Brian