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[73.183.52.120]) by smtp.gmail.com with ESMTPSA id af79cd13be357-910baf2236fsm1529569185a.20.2026.05.18.08.53.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 08:53:26 -0700 (PDT) Date: Mon, 18 May 2026 11:53:24 -0400 From: Brian Masney To: Junhui Liu Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Troy Mitchell Subject: Re: [PATCH v5 1/6] clk: correct clk_div_mask() return value for width == 32 Message-ID: References: <20260514-dr1v90-cru-v5-0-34f3021aab51@pigmoral.tech> <20260514-dr1v90-cru-v5-1-34f3021aab51@pigmoral.tech> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260514-dr1v90-cru-v5-1-34f3021aab51@pigmoral.tech> User-Agent: Mutt/2.3.1 (2026-03-20) On Thu, May 14, 2026 at 05:27:17PM +0800, Junhui Liu wrote: > The macro clk_div_mask() currently wraps to zero when width is 32 due to > 1 << 32 being undefined behavior. This leads to incorrect mask generation > and prevents correct retrieval of register field values for 32-bit-wide > dividers. > > Although it is unlikely to exhaust all U32_MAX div, some clock IPs may rely > on a 32-bit val entry in their div_table to match a div, so providing a > full 32-bit mask is necessary. > > Fix this by using the standard GENMASK() macro. This safely resolves the > undefined behavior on both 32-bit and 64-bit architectures, while also > benefiting from the built-in compile-time type and bounds checking > provided by the GENMASK() macro. > > Cc: Troy Mitchell > Cc: Brian Masney > Signed-off-by: Junhui Liu Reviewed-by: Brian Masney