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[73.183.53.213]) by smtp.gmail.com with ESMTPSA id af79cd13be357-92e623386a3sm4363585a.34.2026.06.29.08.27.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jun 2026 08:27:21 -0700 (PDT) Date: Mon, 29 Jun 2026 11:27:19 -0400 From: Brian Masney To: Vladimir Zapolskiy Cc: Konrad Dybcio , Bjorn Andersson , Michael Turquette , Stephen Boyd , Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] clk: qcom: enable ALWAYS_ON for titan_top_gdsc Message-ID: References: <20260626-camcc-sc8280xp-titan-top-v1-1-2ca246886493@redhat.com> <41a76941-2e21-49ce-b0cd-0ae6a8b2eb1f@linaro.org> <03596c5b-9448-49e3-a035-25c0475df9be@linaro.org> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="pnxlf4Bzm5/y2KKA" Content-Disposition: inline In-Reply-To: <03596c5b-9448-49e3-a035-25c0475df9be@linaro.org> User-Agent: Mutt/2.3.2 (2026-04-26) --pnxlf4Bzm5/y2KKA Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Vladimir, On Mon, Jun 29, 2026 at 04:00:46PM +0300, Vladimir Zapolskiy wrote: > commenting the series I was also directed by Konrad's review comment on it. > In addition one problem, which I immediate observe, is that camcc_sc8280xp_desc > misses the necessary .use_rpm flag, can you please do me a favour and test > my series plus the add-on change below? > > diff --git a/drivers/clk/qcom/camcc-sc8280xp.c b/drivers/clk/qcom/camcc-sc8280xp.c > index 18f5a3eb313e..a15e9754bfb2 100644 > --- a/drivers/clk/qcom/camcc-sc8280xp.c > +++ b/drivers/clk/qcom/camcc-sc8280xp.c > @@ -2995,6 +2995,8 @@ static const struct qcom_cc_desc camcc_sc8280xp_desc = { > .num_resets = ARRAY_SIZE(camcc_sc8280xp_resets), > .gdscs = camcc_sc8280xp_gdscs, > .num_gdscs = ARRAY_SIZE(camcc_sc8280xp_gdscs), > + .use_rpm = true, > + .cc_gdsc = &titan_top_gdsc, > }; > static const struct of_device_id camcc_sc8280xp_match_table[] = { I tried with this initially, however it fails with: [ 8.193803] camcc-sc8280xp ad00000.clock-controller: Unbalanced pm_runtime_enable! I see that pm_runtime_enable() is called from common.c when use_rpm is enabled. So I removed all of that from camcc-sc8280xp.c with the attached patch. It still fails with: [ 8.204595] camcc-sc8280xp ad00000.clock-controller: probe with driver camcc-sc8280xp failed with error -22 I suspect the use_rpm flag requires a more thorough migration. Brian --pnxlf4Bzm5/y2KKA Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=camcc-sc8280xp.patch diff --git a/drivers/clk/qcom/camcc-sc8280xp.c b/drivers/clk/qcom/camcc-sc8280xp.c index 18f5a3eb313e1..a7d2a86ddaa36 100644 --- a/drivers/clk/qcom/camcc-sc8280xp.c +++ b/drivers/clk/qcom/camcc-sc8280xp.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include @@ -2995,6 +2994,8 @@ static const struct qcom_cc_desc camcc_sc8280xp_desc = { .num_resets = ARRAY_SIZE(camcc_sc8280xp_resets), .gdscs = camcc_sc8280xp_gdscs, .num_gdscs = ARRAY_SIZE(camcc_sc8280xp_gdscs), + .use_rpm = true, + .cc_gdsc = &titan_top_gdsc, }; static const struct of_device_id camcc_sc8280xp_match_table[] = { @@ -3008,19 +3009,9 @@ static int camcc_sc8280xp_probe(struct platform_device *pdev) struct regmap *regmap; int ret; - ret = devm_pm_runtime_enable(&pdev->dev); - if (ret) - return ret; - - ret = pm_runtime_resume_and_get(&pdev->dev); - if (ret) - return ret; - regmap = qcom_cc_map(pdev, &camcc_sc8280xp_desc); - if (IS_ERR(regmap)) { - ret = PTR_ERR(regmap); - goto err_put_rpm; - } + if (IS_ERR(regmap)) + return PTR_ERR(regmap); clk_lucid_pll_configure(&camcc_pll0, regmap, &camcc_pll0_config); clk_lucid_pll_configure(&camcc_pll1, regmap, &camcc_pll1_config); @@ -3038,14 +3029,10 @@ static int camcc_sc8280xp_probe(struct platform_device *pdev) if (ret) goto err_disable; - pm_runtime_put(&pdev->dev); - return 0; err_disable: regmap_update_bits(regmap, 0xc1e4, BIT(0), 0); -err_put_rpm: - pm_runtime_put_sync(&pdev->dev); return ret; } --pnxlf4Bzm5/y2KKA--