Linux clock framework development
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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: linux-clk@vger.kernel.org, linux-mips@vger.kernel.org,
	tsbogend@alpha.franken.de, john@phrozen.org,
	linux-kernel@vger.kernel.org, p.zabel@pengutronix.de,
	mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	devicetree@vger.kernel.org, arinc.unal@arinc9.com
Subject: Re: [PATCH v4 8/9] mips: ralink: get cpu rate from new driver code
Date: Sat, 17 Jun 2023 19:27:05 +0200	[thread overview]
Message-ID: <b995dead-5cca-de05-5840-bed882d2c4ff@linaro.org> (raw)
In-Reply-To: <CAMhs-H_HjsT2om2CZpMmVDYao=M5FoZwyy0Te1QB9MLj6mAxnw@mail.gmail.com>

On 17/06/2023 17:35, Sergio Paracuellos wrote:
> On Sat, Jun 17, 2023 at 4:48 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 17/06/2023 07:24, Sergio Paracuellos wrote:
>>> At very early stage on boot, there is a need to set 'mips_hpt_frequency'.
>>> This timer frequency is a half of the CPU frequency. To get clocks properly
>>> set we need to call to 'of_clk_init()' and properly get cpu clock frequency
>>> afterwards. Depending on the SoC, CPU clock index in the clock provider is
>>> different being two for MT7620 SoC and one for the rest. Hence, adapt code
>>> to be aligned with new clock driver.
>>
>>
>>>  void __init plat_time_init(void)
>>>  {
>>> +     struct of_phandle_args clkspec;
>>>       struct clk *clk;
>>> +     int cpu_clk_idx;
>>>
>>>       ralink_of_remap();
>>>
>>> -     ralink_clk_init();
>>> -     clk = clk_get_sys("cpu", NULL);
>>> +     cpu_clk_idx = clk_cpu_index();
>>> +     if (cpu_clk_idx == -1)
>>> +             panic("unable to get CPU clock index");
>>> +
>>> +     of_clk_init(NULL);
>>> +     clkspec.np = of_find_node_by_name(NULL, "sysc");
>>> +     clkspec.args_count = 1;
>>> +     clkspec.args[0] = cpu_clk_idx;
>>> +     clk = of_clk_get_from_provider(&clkspec);
>>
>> This is very obfuscated way of getting clock. Why can't you get it from
>> "clocks" property of "cpu", like every other recent platform?
> 
> I did not find any other approach that works for me. So I ended up in this one.
> Can you point me out in a sample of code doing the same so I can check
> if it works for me then?

You mean bindings?
git grep cpus.yaml

Driver?
git grep clk_get_rate
clk_get
eventually of_clk_get

It all depends on the context.

Anyway, it is very easy to find existing solutions not using
of_find_node_by_name for your platform:

git grep mips_hpt_frequency

First result.


Best regards,
Krzysztof


  reply	other threads:[~2023-06-17 17:27 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-17  5:24 [PATCH v4 0/9] [PATCH v3 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 1/9] dt-bindings: clock: add mtmips SoCs system controller Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-06-17 12:54   ` [PATCH v3 " Shiji Yang
2023-06-17 13:07     ` Krzysztof Kozlowski
2023-06-17 13:31       ` Sergio Paracuellos
2023-06-17 14:43         ` Krzysztof Kozlowski
2023-06-17 15:37           ` Sergio Paracuellos
2023-06-17 17:20             ` Krzysztof Kozlowski
2023-06-17 19:11               ` Sergio Paracuellos
2023-06-18  5:04                 ` Sergio Paracuellos
2023-06-17 13:26     ` Sergio Paracuellos
2023-06-17 14:43       ` Krzysztof Kozlowski
2023-06-17 15:31         ` Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 3/9] mips: ralink: rt288x: remove clock related code Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 4/9] mips: ralink: rt305x: " Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 5/9] mips: ralink: rt3883: " Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 6/9] mips: ralink: mt7620: " Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 7/9] mips: ralink: remove reset " Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 8/9] mips: ralink: get cpu rate from new driver code Sergio Paracuellos
2023-06-17 14:48   ` Krzysztof Kozlowski
2023-06-17 15:35     ` Sergio Paracuellos
2023-06-17 17:27       ` Krzysztof Kozlowski [this message]
2023-06-17 19:01         ` Sergio Paracuellos
2023-06-17  5:24 ` [PATCH v4 9/9] MAINTAINERS: add Mediatek MTMIPS Clock maintainer Sergio Paracuellos

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