From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Cixi Geng <gengcixi@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
sboyd@kernel.org, Rob Herring <robh+dt@kernel.org>,
krzysztof.kozlowski+dt@linaro.org,
Orson Zhai <orsonzhai@gmail.com>,
"baolin.wang7@gmail.com" <baolin.wang7@gmail.com>,
Chunyan Zhang <zhang.lyra@gmail.com>,
linux-clk@vger.kernel.org,
Devicetree List <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V3 1/3] dt-bindings: clk: sprd: Add bindings for ums512 clock controller
Date: Sun, 24 Apr 2022 13:20:59 +0200 [thread overview]
Message-ID: <baa73bda-91af-8a31-67f4-6d5615862c73@linaro.org> (raw)
In-Reply-To: <CAF12kFu5KW+fw=0kP6LrEqOvKYR38mELfPjG64=n+gudRxsZUQ@mail.gmail.com>
On 24/04/2022 12:47, Cixi Geng wrote:
> Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 于2022年4月19日周二 14:38写道:
>>
>> On 19/04/2022 03:53, Cixi Geng wrote:
>>> Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 于2022年4月19日周二 00:28写道:
>>>>
>>>> On 18/04/2022 14:56, Cixi Geng wrote:
>>>>> From: Cixi Geng <cixi.geng1@unisoc.com>
>>>>>
>>>>> Add a new bindings to describe ums512 clock compatible string.
>>>>>
>>>>> Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com>
>>>>> ---
>>>>> .../bindings/clock/sprd,ums512-clk.yaml | 112 ++++++++++++++++++
>>>>> 1 file changed, 112 insertions(+)
>>>>> create mode 100644 Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
>>>>> new file mode 100644
>>>>> index 000000000000..89824d7c6be4
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
>>>>> @@ -0,0 +1,112 @@
>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>>> +# Copyright 2022 Unisoc Inc.
>>>>> +%YAML 1.2
>>>>> +---
>>>>> +$id: "http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#"
>>>>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
>>>>> +
>>>>> +title: UMS512 Clock Control Unit Device Tree Bindings
>>>>
>>>> Remove "Device Tree Bindings". You could do the same also in the
>>>> subject, because you repeat the prefix ("dt-bindings: clk: sprd: Add
>>>> ums512 clock controller").
>>>>
>>>>> +
>>>>> +maintainers:
>>>>> + - Orson Zhai <orsonzhai@gmail.com>
>>>>> + - Baolin Wang <baolin.wang7@gmail.com>
>>>>> + - Chunyan Zhang <zhang.lyra@gmail.com>
>>>>> +
>>>>> +properties:
>>>>> + "#clock-cells":
>>>>> + const: 1
>>>>> +
>>>>> + compatible:
>>>>
>>>> Put the compatible first, by convention and makes finding matching
>>>> bindings easier.
>>>>
>>>>> + oneOf:
>>>>> + - items:
>>>>> + - const: sprd,ums512-glbregs
>>>>> + - const: syscon
>>>>> + - const: simple-mfd
>>>>
>>>> Why do you need simple-mfd for these? This looks like a regular syscon,
>>>> so usually does not come with children. What is more, why this "usual
>>>> syscon" is a separate clock controller in these bindings?
>>> there is a warning log before add these const. and the reason we need
>>> the simply-mfd
>>> is some clock is a child of syscon node,which should set these compatible.
>>> failed to match any schema with compatible: ['sprd,ums512-glbregs',
>>> 'syscon', 'simple-mfd']
>>
>> Neither here nor later you did not answer the question - why do you need
>> such complex construction, instead of adding syscon to the clock controller?
>>
>> Let me paste again my concerns:
>>
>> You have nodes with reg but without unit address ("rpll"). These nodes
>> are modeled as children but they are not children - it's a workaround
>> for exposing syscon, isn't it? The sc9863a looks like broken design,
>> so please do not duplicate it here.
>>
>> IOW, sc9863a uses similar pattern as here and the DTS is made wrong.
>> Because of this you need to create complex ways to get the regmap for
>> the clock controller... Why not making it simple? Clock controller with
>> syscon?
>
> I find the history discuss about the sp9863 clock[1] and last
> ums512-clk dt-bindings patch[2] which from chunyan.
> please refer to the reasons below.
>
> These clocks are at the same register range with global registers.
> the registers shared with more than one devices which basically
> are multimedia devices. You may noticed that these are all gate
> clocks which are in the global registers ranges and are used to
> controll the enable status of some devices or some part of devices.
>
> [1] https://lore.kernel.org/all/CAAfSe-s0gcehu0ZDj=FTe5S7CzAHC5mahXBH2fJm7mXS7Xys1Q@mail.gmail.com/#r
> [2] https://lore.kernel.org/all/163425295208.1688384.11023187625793114662@swboyd.mtv.corp.google.com/#r
Which looks like discussion about different bindings. You had there a
clock controller and additional clock device using "sprd,syscon". Why
the rpll is a subdevice and not a part of clock controller. The same as
all other clocks coming from that clock-controller, right? What is so
special about rpll that is is a separate device, not part of the clock
controller? It's the same address space, isn't it?
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-04-24 11:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-18 12:56 [PATCH V3 0/3] Add ums512 clocks and relative bindings file Cixi Geng
2022-04-18 12:56 ` [PATCH V3 1/3] dt-bindings: clk: sprd: Add bindings for ums512 clock controller Cixi Geng
2022-04-18 16:28 ` Krzysztof Kozlowski
2022-04-19 1:53 ` Cixi Geng
2022-04-19 6:38 ` Krzysztof Kozlowski
2022-04-24 3:14 ` Cixi Geng
2022-04-24 10:07 ` Krzysztof Kozlowski
2022-04-24 10:47 ` Cixi Geng
2022-04-24 11:20 ` Krzysztof Kozlowski [this message]
2022-04-24 14:22 ` Cixi Geng
2022-04-24 14:30 ` Krzysztof Kozlowski
2022-04-24 15:12 ` Cixi Geng
2022-04-25 9:00 ` Krzysztof Kozlowski
2022-04-26 5:40 ` Cixi Geng
2022-04-27 6:13 ` Krzysztof Kozlowski
2022-04-18 12:56 ` [PATCH V3 2/3] clk: sprd: Add dt-bindings include file for UMS512 Cixi Geng
2022-04-18 16:14 ` Krzysztof Kozlowski
2022-04-18 12:56 ` [PATCH V3 3/3] clk: sprd: Add clocks support " Cixi Geng
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