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Fri, 02 May 2025 11:07:30 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 542B7T93016582 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 2 May 2025 11:07:29 GMT Received: from [10.216.12.65] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 2 May 2025 04:07:26 -0700 Message-ID: Date: Fri, 2 May 2025 16:37:13 +0530 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] clk: qcom: gcc: Set FORCE_MEM_CORE_ON for gcc_ufs_axi_clk for 8650/8750 To: Taniya Das , Bjorn Andersson , Michael Turquette , "Stephen Boyd" CC: Ajit Pandey , Jagadeesh Kona , , , References: <20250414-gcc_ufs_mem_core-v1-0-67b5529b9b5d@quicinc.com> <20250414-gcc_ufs_mem_core-v1-1-67b5529b9b5d@quicinc.com> Content-Language: en-US From: Imran Shaik In-Reply-To: <20250414-gcc_ufs_mem_core-v1-1-67b5529b9b5d@quicinc.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=G5AcE8k5 c=1 sm=1 tr=0 ts=6814a772 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=COk6AnOGAAAA:8 a=gAXrXOzCDS_PG0fV7eMA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTAyMDA4NyBTYWx0ZWRfXwKnIYEmKc2tx Kjf7vPjem8alUYl7cLoTOsjMuH9ULMzK97M27R3EuGxS6cWbBgxuprcMkj+7Q73Avof9czTG94F a6jVuIM2WmvEeW3Dk0y1/xMfZwzsizFt3XAAIvJlmBnCfQoVH0fdHYb/801IeHLjEei4ohg9uAh Wtx33+rkE3VeivOaSko+xTg9vBmSXKHZCGc7AaZgQN0hYIysaow7WXwPvaCJZ8vGnpfzkJ2kQwC 3YrHcMqh1t/Bp1fu9hR8VSUncPN/7ae57SQy/SIIWsBE5Tux89JHBOEBoo9Qp5XwJftMbHuALGB BZybhBR7x3xKFtHlaLvmM/59d8rjqPBFDoOLXTEHGbtTto+fLqWBLRCoFwauqJXE8SzJsp22ieJ ZsNBfxlh5giOUzDRzXb62nasiqcniZ/HQ+2O9MbsC9JDGWxQdkX1l4FL7I3fQQTPJi2Z79dw X-Proofpoint-GUID: 1ztGRFG-jNAm7Kq3Xi7ABpsYHC2N-_ik X-Proofpoint-ORIG-GUID: 1ztGRFG-jNAm7Kq3Xi7ABpsYHC2N-_ik X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-02_01,2025-04-30_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 impostorscore=0 phishscore=0 mlxlogscore=999 lowpriorityscore=0 adultscore=0 mlxscore=0 malwarescore=0 suspectscore=0 clxscore=1015 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2505020087 On 4/14/2025 2:30 PM, Taniya Das wrote: > Update the force mem core bit for UFS AXI clock to force the core on > signal to remain active during halt state of the clk. If force mem > core bit of the clock is not set, the memories of the subsystem will > not retain the logic across power states. This is required for the MCQ > feature of the UFS driver. > > Signed-off-by: Taniya Das > --- > drivers/clk/qcom/gcc-sm8650.c | 2 ++ > drivers/clk/qcom/gcc-sm8750.c | 3 ++- > 2 files changed, 4 insertions(+), 1 deletion(-) > Reviewed-by: Imran Shaik Thanks, Imran