From: Rahul Tanwar <rahul.tanwar@linux.intel.com>
To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
robhkernel.org@vger.kernel.org, mark.rutland@arm.com,
linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com,
qi-ming.wu@intel.com, yixin.zhu@linux.intel.com,
cheol.yong.kim@intel.com, rahul.tanwar@intel.com,
Rahul Tanwar <rahul.tanwar@linux.intel.com>
Subject: [PATCH v1 0/2] clk: intel: Add a new driver for a new clock controller IP
Date: Wed, 28 Aug 2019 15:00:16 +0800 [thread overview]
Message-ID: <cover.1566975410.git.rahul.tanwar@linux.intel.com> (raw)
Hi,
A forthcoming Intel network processor SoC uses a new Clock Generation Unit(CGU)
IP for clock controller. This series adds the clock driver for CGU.
Patch 1 adds common clock framework based clock driver for CGU.
Patch 2 adds bindings document & include file for CGU.
These patches are baselined upon Linux 5.3-rc1 at below Git link:
git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
Rahul Tanwar (1):
dt-bindings: clk: intel: Add bindings document & header file for CGU
rtanwar (1):
clk: intel: Add CGU clock driver for a new SoC
.../devicetree/bindings/clock/intel,cgu-lgm.yaml | 61 +++
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/intel/Kconfig | 13 +
drivers/clk/intel/Makefile | 4 +
drivers/clk/intel/clk-cgu-pll.c | 160 ++++++
drivers/clk/intel/clk-cgu-pll.h | 24 +
drivers/clk/intel/clk-cgu.c | 544 +++++++++++++++++++++
drivers/clk/intel/clk-cgu.h | 278 +++++++++++
drivers/clk/intel/clk-lgm.c | 352 +++++++++++++
include/dt-bindings/clock/intel,lgm-clk.h | 150 ++++++
11 files changed, 1588 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml
create mode 100644 drivers/clk/intel/Kconfig
create mode 100644 drivers/clk/intel/Makefile
create mode 100644 drivers/clk/intel/clk-cgu-pll.c
create mode 100644 drivers/clk/intel/clk-cgu-pll.h
create mode 100644 drivers/clk/intel/clk-cgu.c
create mode 100644 drivers/clk/intel/clk-cgu.h
create mode 100644 drivers/clk/intel/clk-lgm.c
create mode 100644 include/dt-bindings/clock/intel,lgm-clk.h
--
2.11.0
next reply other threads:[~2019-08-28 7:00 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-28 7:00 Rahul Tanwar [this message]
2019-08-28 7:00 ` [PATCH v1 1/2] clk: intel: Add CGU clock driver for a new SoC Rahul Tanwar
2019-08-28 15:09 ` Andy Shevchenko
2019-09-02 7:43 ` Tanwar, Rahul
2019-09-02 12:20 ` Andy Shevchenko
2019-09-02 12:24 ` Andy Shevchenko
2019-12-06 4:39 ` Tanwar, Rahul
2019-12-07 14:57 ` Andy Shevchenko
2019-12-24 3:04 ` Stephen Boyd
2019-09-02 22:20 ` Martin Blumenstingl
2019-09-03 9:54 ` Tanwar, Rahul
2019-09-03 18:53 ` Martin Blumenstingl
2019-09-04 8:03 ` Tanwar, Rahul
2019-09-05 20:47 ` Martin Blumenstingl
2019-09-09 14:16 ` Kim, Cheol Yong
2019-09-16 18:36 ` Stephen Boyd
2019-09-03 23:54 ` Stephen Boyd
2019-08-28 7:00 ` [PATCH v1 2/2] dt-bindings: clk: intel: Add bindings document & header file for CGU Rahul Tanwar
2019-12-19 16:33 ` Rob Herring
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