[GIT PULL] clk: renesas: Updates for v6.1

[Geert Uytterhoeven <geert+renesas@glider.be>]

	Hi Mike, Stephen,

The following changes since commit 568035b01cfb107af8d2e4bd2fb9aea22cf5b868:

  Linux 6.0-rc1 (2022-08-14 15:50:18 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.1-tag1

for you to fetch changes up to e312ae92077f90d6ccdca05fb6d640bd9624c37c:

  dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC (2022-09-02 10:47:30 +0200)

----------------------------------------------------------------
clk: renesas: Updates for v6.1

  - Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8,
  - Add I2C clocks and resets on RZ/V2M,
  - Document clock support for the RZ/Five SoC,
  - Miscellaneous fixes and improvements.

Thanks for pulling!

----------------------------------------------------------------
Biju Das (1):
      clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info

Lad Prabhakar (1):
      dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC

Phil Edworthy (1):
      clk: renesas: r9a09g011: Add IIC clock and reset entries

Wolfram Sang (4):
      clk: renesas: r8a779f0: Add SDH0 clock
      clk: renesas: r8a779f0: Add CMT clocks
      clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
      clk: renesas: r8a779f0: Add MSIOF clocks

 .../bindings/clock/renesas,rzg2l-cpg.yaml           |  2 +-
 drivers/clk/renesas/r8a779f0-cpg-mssr.c             | 21 ++++++++++++++++++++-
 drivers/clk/renesas/r9a07g044-cpg.c                 |  2 ++
 drivers/clk/renesas/r9a09g011-cpg.c                 |  4 ++++
 4 files changed, 27 insertions(+), 2 deletions(-)

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds