[PATCH 02/10] dt-bindings: clock: Add MSM8937 Global Clock controller compatible

Barnabás Czémán
2025-02-11T22:38:17Z

From: Daniil Titov <daniilt971@gmail.com>

Document the qcom,gcc-msm8937 compatible and add new input clocks.

Signed-off-by: Daniil Titov <daniilt971@gmail.com>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
---
.../bindings/clock/qcom,gcc-msm8917.yaml | 23 ++++++++++++++++++----
include/dt-bindings/clock/qcom,gcc-msm8917.h | 17 ++++++++++++++++
2 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8917.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8917.yaml
index 6e567b2a5153af9bb32958154633d6da5fd1cd50..689c5760d9cd1fc96d97e5705cd1fcd48324433a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8917.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8917.yaml
@@ -4,14 +4,14 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8917.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Qualcomm Global Clock & Reset Controller on MSM8917 and QM215
+title: Qualcomm Global Clock & Reset Controller on MSM8917, MSM8937 and QM215

maintainers:
- Otto Pflüger <otto.pflueger@abscue.de>

description: |
Qualcomm global clock control module provides the clocks, resets and power
- domains on MSM8917 or QM215.
+ domains on MSM8917, MSM8937 or QM215.

See also:: include/dt-bindings/clock/qcom,gcc-msm8917.h

@@ -20,6 +20,7 @@ properties:
enum:
- qcom,gcc-msm8917
- qcom,gcc-qm215
+ - qcom,gcc-msm8937

clocks:
items:
@@ -27,6 +28,8 @@ properties:
- description: Sleep clock source
- description: DSI phy instance 0 dsi clock
- description: DSI phy instance 0 byte clock
+ - description: DSI phy instance 1 dsi clock
+ - description: DSI phy instance 1 byte clock

clock-names:
items:
@@ -34,6 +37,8 @@ properties:
- const: sleep_clk
- const: dsi0pll
- const: dsi0pllbyte
+ - const: dsi1pll
+ - const: dsi1pllbyte

required:
- compatible
@@ -53,7 +58,17 @@ examples:
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
- clocks = <&xo_board>, <&sleep_clk>, <&dsi0_phy 1>, <&dsi0_phy 0>;
- clock-names = "xo", "sleep_clk", "dsi0pll", "dsi0pllbyte";
+ clocks = <&xo_board>,
+ <&sleep_clk>,
+ <&dsi0_phy 1>,
+ <&dsi0_phy 0>,
+ <&dsi1_phy 1>,
+ <&dsi1_phy 0>;
+ clock-names = "xo",
+ "sleep",
+ "dsi0pll",
+ "dsi0pllbyte",
+ "dsi1pll",
+ "dsi1pllbyte";
};
...
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8917.h b/include/dt-bindings/clock/qcom,gcc-msm8917.h
index 4b421e7414b50bef2e2400f868ae5b7212a427bb..ec1f0b261dd5ccfe4896a00ffa9cf86de98b9cb3 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8917.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8917.h
@@ -170,6 +170,22 @@
#define VFE1_CLK_SRC 163
#define VSYNC_CLK_SRC 164
#define GPLL0_SLEEP_CLK_SRC 165
+#define BLSP1_QUP1_I2C_APPS_CLK_SRC 166
+#define BLSP1_QUP1_SPI_APPS_CLK_SRC 167
+#define BLSP2_QUP4_I2C_APPS_CLK_SRC 168
+#define BLSP2_QUP4_SPI_APPS_CLK_SRC 169
+#define BYTE1_CLK_SRC 170
+#define ESC1_CLK_SRC 171
+#define PCLK1_CLK_SRC 172
+#define GCC_BLSP1_QUP1_I2C_APPS_CLK 173
+#define GCC_BLSP1_QUP1_SPI_APPS_CLK 174
+#define GCC_BLSP2_QUP4_I2C_APPS_CLK 175
+#define GCC_BLSP2_QUP4_SPI_APPS_CLK 176
+#define GCC_MDSS_BYTE1_CLK 177
+#define GCC_MDSS_ESC1_CLK 178
+#define GCC_MDSS_PCLK1_CLK 179
+#define GCC_OXILI_AON_CLK 180
+#define GCC_OXILI_TIMER_CLK 181

/* GCC block resets */
#define GCC_CAMSS_MICRO_BCR 0
@@ -187,5 +203,6 @@
#define VENUS_GDSC 5
#define VFE0_GDSC 6
#define VFE1_GDSC 7
+#define OXILI_CX_GDSC 8

#endif

--
2.48.1