From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4309C433FE for ; Thu, 21 Apr 2022 09:08:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1387331AbiDUJLG (ORCPT ); Thu, 21 Apr 2022 05:11:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46158 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1387349AbiDUJK7 (ORCPT ); Thu, 21 Apr 2022 05:10:59 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EED1E23174; Thu, 21 Apr 2022 02:08:10 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id F338D1F45275 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1650532089; bh=sBf44Cesk54kZ/DtmuF8wUK6DJExLvoWBxhHa0QYby4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Rmepv4LWshLzGNdMslSSq3jLZP7KVxaV1jNda+cStLeVpqk8DIlaG9Bu6jkgM9Gna dtil2YN1R8+ISwp3XG1rj+vKs460GuXyPBBOeEMJH58bFKbjVL0bMB9OWX2VQCLVXR 3eQBljnjBwSb1BrOmMmbu4feRnNT9cGWkmsYdN/qksBw9KQARDNDKYSv2WdNH1jP4U Fkyg1EZitsdQx5fXOQe4vOtloAc6UjUVBn6AA9Qozai2uLjA9fARPBVHB2j68WjboH r1YkLmYI09szVeGlItTtpN33xLDrv90BRI6WWwSjoWw7Fmh5MvpZPoiCRT+Mv+iZpw NwK2vharQJdXg== Message-ID: Date: Thu, 21 Apr 2022 11:08:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH V2 01/12] clk: mediatek: reset: Fix written reset bit offset Content-Language: en-US To: Rex-BC Chen , mturquette@baylibre.com, sboyd@kernel.org Cc: matthias.bgg@gmail.com, p.zabel@pengutronix.de, chun-jie.chen@mediatek.com, wenst@chromium.org, runyang.chen@mediatek.com, linux-kernel@vger.kernel.org, allen-kh.cheng@mediatek.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com References: <20220420130527.23200-1-rex-bc.chen@mediatek.com> <20220420130527.23200-2-rex-bc.chen@mediatek.com> From: AngeloGioacchino Del Regno In-Reply-To: <20220420130527.23200-2-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Il 20/04/22 15:05, Rex-BC Chen ha scritto: > Original assert/deassert bit is BIT(0), but it's more resonable to modify > them to BIT(id % 32) which is based on id. > > This patch will not influence any previous driver because the reset is > only used for thermal. The id (MT8183_INFRACFG_AO_THERM_SW_RST) is 0. > > Fixes: 64ebb57a3df6 ("clk: reset: Modify reset-controller driver") > Signed-off-by: Rex-BC Chen > Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno