From: Abhishek Sahu <absahu@codeaurora.org>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: mturquette@baylibre.com, andy.gross@linaro.org,
david.brown@linaro.org, rnayak@codeaurora.org,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC 06/12] Clk: qcom: support for dynamic updating the PLL
Date: Wed, 02 Aug 2017 19:20:50 +0530 [thread overview]
Message-ID: <d5d68fc218a04e1bf427e63656a2bfcf@codeaurora.org> (raw)
In-Reply-To: <20170801211237.GM2146@codeaurora.org>
On 2017-08-02 02:42, Stephen Boyd wrote:
> On 07/30, Abhishek Sahu wrote:
>> On 2017-07-29 00:04, Stephen Boyd wrote:
>> >On 07/27, Abhishek Sahu wrote:
>> 2. Following patch fixes different issue although flag name
>> is common.
>>
>> https://patchwork.kernel.org/patch/9662917/
>>
>> Shall I include this patch in my patch series but not
>> sure we can directly turn off the PLL inside the PLL
>> set rate operation since it will turn the PLL off for
>> all its users.
>>
>
> Hopefully the users of a PLL that doesn't support dynamic rate
> update can accept the fact that the clk will turn off while the
> rate is reprogrammed. At least that seems to be true for Taniya
> in that patch set. If it isn't true for your hardware, then don't
> specify the flag? Or is the problem that you may not have the
> flag set for certain PLLs that you're supporting?
The turning off PLL will happen in case of flag is not set.
The turning off PLL in set rate is unsafe. If this PLL
is driving multiple RCG's and one of the RCG is changing the
PLL frequency by its clk_set_rate with CLK_SET_RATE_PARENT,
then all the RCG's clock will go off for some
time and it may trigger crash/silent reboot.
If the user is aware, then it can turn off the clock first,
then do the set rate and then it can enable again. In
PLL set_rate we can check if PLL is enabled and can
return EBUSY error.
next prev parent reply other threads:[~2017-08-02 13:50 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-27 11:10 [RFC 00/12] Misc patches for QCOM clocks Abhishek Sahu
2017-07-27 11:10 ` [RFC 01/12] clk: qcom: support for register offsets from rcg2 clock node Abhishek Sahu
2017-07-27 18:44 ` Stephen Boyd
2017-07-28 9:42 ` Abhishek Sahu
2017-07-28 17:55 ` Stephen Boyd
2017-07-30 12:57 ` Abhishek Sahu
2017-07-27 11:10 ` [RFC 02/12] clk: qcom: flag for 64 bit CONFIG_CTL Abhishek Sahu
2017-07-28 18:33 ` Stephen Boyd
2017-07-30 13:04 ` Abhishek Sahu
2017-08-01 21:17 ` Stephen Boyd
2017-07-27 11:10 ` [RFC 03/12] clk: qcom: support for alpha mode configuration Abhishek Sahu
2017-07-27 11:10 ` [RFC 04/12] clk: qcom: use offset from alpha pll node Abhishek Sahu
2017-07-30 13:26 ` Abhishek Sahu
2017-07-27 11:10 ` [RFC 05/12] clk: qcom: fix 16 bit alpha support calculation Abhishek Sahu
2017-07-27 11:10 ` [RFC 06/12] Clk: qcom: support for dynamic updating the PLL Abhishek Sahu
2017-07-28 18:34 ` Stephen Boyd
2017-07-30 13:57 ` Abhishek Sahu
2017-08-01 21:12 ` Stephen Boyd
2017-08-02 13:50 ` Abhishek Sahu [this message]
2017-07-27 11:10 ` [RFC 07/12] clk: qcom: add flag for VCO operation Abhishek Sahu
2017-07-27 11:10 ` [RFC 08/12] clk: qcom: support for Huayra PLL Abhishek Sahu
2017-07-27 11:10 ` [RFC 09/12] clk: qcom: support for Brammo PLL Abhishek Sahu
2017-07-27 11:10 ` [RFC 10/12] clk: qcom: add read-only divider operations Abhishek Sahu
2017-07-27 11:10 ` [RFC 11/12] clk: qcom: add read-only alpha pll post " Abhishek Sahu
2017-07-27 11:10 ` [RFC 12/12] clk: qcom: add parent map for regmap mux Abhishek Sahu
2017-07-27 18:39 ` [RFC 00/12] Misc patches for QCOM clocks Stephen Boyd
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