From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Jonathan Marek <jonathan@marek.ca>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
freedreno@lists.freedesktop.org, linux-clk@vger.kernel.org
Subject: Re: [Freedreno] [PATCH v2 02/28] clk: mux: provide devm_clk_hw_register_mux()
Date: Fri, 26 Mar 2021 10:44:45 -0700 [thread overview]
Message-ID: <d84149929b251ccaa5cacb9efdd52e22@codeaurora.org> (raw)
In-Reply-To: <20210324151846.2774204-3-dmitry.baryshkov@linaro.org>
On 2021-03-24 08:18, Dmitry Baryshkov wrote:
> Add devm_clk_hw_register_mux() - devres-managed version of
> clk_hw_register_mux().
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
> drivers/clk/clk-mux.c | 35 +++++++++++++++++++++++++++++++++++
> include/linux/clk-provider.h | 13 +++++++++++++
> 2 files changed, 48 insertions(+)
>
> diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
> index e54e79714818..20582aae7a35 100644
> --- a/drivers/clk/clk-mux.c
> +++ b/drivers/clk/clk-mux.c
> @@ -8,6 +8,7 @@
> */
>
> #include <linux/clk-provider.h>
> +#include <linux/device.h>
> #include <linux/module.h>
> #include <linux/slab.h>
> #include <linux/io.h>
> @@ -206,6 +207,40 @@ struct clk_hw *__clk_hw_register_mux(struct
> device *dev, struct device_node *np,
> }
> EXPORT_SYMBOL_GPL(__clk_hw_register_mux);
>
> +static void devm_clk_hw_release_mux(struct device *dev, void *res)
> +{
> + clk_hw_unregister_mux(*(struct clk_hw **)res);
> +}
> +
> +struct clk_hw *__devm_clk_hw_register_mux(struct device *dev, struct
> device_node *np,
> + const char *name, u8 num_parents,
> + const char * const *parent_names,
> + const struct clk_hw **parent_hws,
> + const struct clk_parent_data *parent_data,
> + unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
> + u8 clk_mux_flags, u32 *table, spinlock_t *lock)
> +{
> + struct clk_hw **ptr, *hw;
> +
> + ptr = devres_alloc(devm_clk_hw_release_mux, sizeof(*ptr),
> GFP_KERNEL);
> + if (!ptr)
> + return ERR_PTR(-ENOMEM);
> +
> + hw = __clk_hw_register_mux(dev, np, name, num_parents, parent_names,
> parent_hws,
> + parent_data, flags, reg, shift, mask,
> + clk_mux_flags, table, lock);
> +
> + if (!IS_ERR(hw)) {
> + *ptr = hw;
> + devres_add(dev, ptr);
> + } else {
> + devres_free(ptr);
> + }
> +
> + return hw;
> +}
> +EXPORT_SYMBOL_GPL(__devm_clk_hw_register_mux);
> +
> struct clk *clk_register_mux_table(struct device *dev, const char
> *name,
> const char * const *parent_names, u8 num_parents,
> unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
> diff --git a/include/linux/clk-provider.h
> b/include/linux/clk-provider.h
> index 58f6fe866ae9..3eb15e0262f5 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -868,6 +868,13 @@ struct clk_hw *__clk_hw_register_mux(struct
> device *dev, struct device_node *np,
> const struct clk_parent_data *parent_data,
> unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
> u8 clk_mux_flags, u32 *table, spinlock_t *lock);
> +struct clk_hw *__devm_clk_hw_register_mux(struct device *dev, struct
> device_node *np,
> + const char *name, u8 num_parents,
> + const char * const *parent_names,
> + const struct clk_hw **parent_hws,
> + const struct clk_parent_data *parent_data,
> + unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
> + u8 clk_mux_flags, u32 *table, spinlock_t *lock);
> struct clk *clk_register_mux_table(struct device *dev, const char
> *name,
> const char * const *parent_names, u8 num_parents,
> unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
> @@ -902,6 +909,12 @@ struct clk *clk_register_mux_table(struct device
> *dev, const char *name,
> __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL,
> \
> (parent_data), (flags), (reg), (shift), \
> BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
> +#define devm_clk_hw_register_mux(dev, name, parent_names,
> num_parents, flags, reg, \
> + shift, width, clk_mux_flags, lock) \
> + __devm_clk_hw_register_mux((dev), NULL, (name), (num_parents),
> \
> + (parent_names), NULL, NULL, (flags), (reg), \
> + (shift), BIT((width)) - 1, (clk_mux_flags), \
> + NULL, (lock))
>
> int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int
> flags,
> unsigned int val);
next prev parent reply other threads:[~2021-03-26 17:45 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-24 15:18 [PATCH v2 00/28] drm/msm/dsi: refactor MSM DSI PHY/PLL drivers Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 01/28] clk: fixed: add devm helper for clk_hw_register_fixed_factor() Dmitry Baryshkov
2021-03-26 17:43 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 02/28] clk: mux: provide devm_clk_hw_register_mux() Dmitry Baryshkov
2021-03-26 17:44 ` abhinavk [this message]
2021-03-24 15:18 ` [PATCH v2 03/28] clk: divider: add devm_clk_hw_register_divider Dmitry Baryshkov
2021-03-26 17:45 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 04/28] drm/msm/dsi: replace PHY's init callback with configurable data Dmitry Baryshkov
2021-03-26 17:46 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 06/28] drm/msm/dsi: drop multiple pll enable_seq support Dmitry Baryshkov
2021-03-26 17:49 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 07/28] drm/msm/dsi: move all PLL callbacks into PHY config struct Dmitry Baryshkov
2021-03-26 17:51 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 08/28] drm/msm/dsi: drop global msm_dsi_phy_type enumaration Dmitry Baryshkov
2021-03-26 17:52 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 09/28] drm/msm/dsi: move min/max PLL rate to phy config Dmitry Baryshkov
2021-03-26 17:53 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 10/28] drm/msm/dsi: remove msm_dsi_pll_set_usecase Dmitry Baryshkov
2021-03-26 17:54 ` [Freedreno] " abhinavk
2021-03-24 15:18 ` [PATCH v2 11/28] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
2021-03-26 18:05 ` [Freedreno] " abhinavk
2021-03-26 20:36 ` Dmitry Baryshkov
2021-03-26 20:48 ` abhinavk
2021-03-27 0:58 ` Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 12/28] arm64: dts: qcom: sdm845: assign DSI clock source parents Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 13/28] arm64: dts: qcom: sc7180: " Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 14/28] drm/msm/dsi: push provided clocks handling into a generic code Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 15/28] drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocks Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 16/28] drm/msm/dsi: use devm_of_clk_add_hw_provider Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 17/28] drm/msm/dsi: make save/restore_state phy-level functions Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 18/28] drm/msm/dsi: drop vco_delay setting from 7nm, 10nm, 14nm drivers Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 19/28] drm/msm/dpu: simplify vco_delay handling in dsi_phy_28nm driver Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 20/28] drm/msi/dsi: inline msm_dsi_pll_helper_clk_prepare/unprepare Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 21/28] drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phy Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 22/28] drm/msm/dsi: drop msm_dsi_pll abstracton Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 23/28] drm/msm/dsi: drop PLL accessor functions Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 24/28] drm/msm/dsi: move ioremaps to dsi_phy_driver_probe Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 25/28] drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instances Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 26/28] drm/msm/dsi: remove temp data from global pll structure Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 27/28] drm/msm/dsi: inline msm_dsi_phy_set_src_pll Dmitry Baryshkov
2021-03-24 15:18 ` [PATCH v2 28/28] drm/msm/dsi: stop passing src_pll_id to the phy_enable call Dmitry Baryshkov
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