From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46CE5C07E9D for ; Wed, 28 Sep 2022 02:41:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232144AbiI1ClI (ORCPT ); Tue, 27 Sep 2022 22:41:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231684AbiI1ClH (ORCPT ); Tue, 27 Sep 2022 22:41:07 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F09C10253C; Tue, 27 Sep 2022 19:41:04 -0700 (PDT) X-UUID: 0116d708030d4f4794d5bae4c99aee36-20220928 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; 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Wed, 28 Sep 2022 10:41:00 +0800 Received: from mhfsdcap04 (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 28 Sep 2022 10:40:59 +0800 Message-ID: Subject: Re: [PATCH v1 14/17] phy: mediatek: add support for phy-mtk-hdmi-mt8195 From: Chunfeng Yun To: Guillaume Ranquet , Matthias Brugger , Vinod Koul , Stephen Boyd , David Airlie , Rob Herring , Philipp Zabel , "Krzysztof Kozlowski" , Daniel Vetter , CK Hu , Jitao shi , Chun-Kuang Hu , "Michael Turquette" , Kishon Vijay Abraham I CC: , , Pablo Sun , , , Mattijs Korpershoek , , , Date: Wed, 28 Sep 2022 10:40:59 +0800 In-Reply-To: References: <20220919-v1-0-4844816c9808@baylibre.com> <20220919-v1-14-4844816c9808@baylibre.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Tue, 2022-09-27 at 06:23 -0700, Guillaume Ranquet wrote: > On Tue, 20 Sep 2022 09:46, Chunfeng Yun > wrote: > > On Mon, 2022-09-19 at 18:56 +0200, Guillaume Ranquet wrote: > > > Add basic support for the mediatek hdmi phy on MT8195 SoC > > > > > > Signed-off-by: Guillaume Ranquet > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c > > > b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c > > > index bb7593ea4c86..0157acdce56c 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_mt8195_hdmi.c > > > @@ -1344,6 +1344,8 @@ static void mtk_hdmi_bridge_disable(struct > > > drm_bridge *bridge, > > > mtk_hdmi_disable_hdcp_encrypt(hdmi); > > > usleep_range(50000, 50050); > > > > > > + phy_power_off(hdmi->phy); > > > + > > > hdmi->enabled = false; > > > } > > > > > > diff --git a/drivers/phy/mediatek/Makefile > > > b/drivers/phy/mediatek/Makefile > > > index fb1f8edaffa7..c9a50395533e 100644 > > > --- a/drivers/phy/mediatek/Makefile > > > +++ b/drivers/phy/mediatek/Makefile > > > @@ -12,6 +12,7 @@ obj-$(CONFIG_PHY_MTK_XSPHY) += phy- > > > mtk- > > > xsphy.o > > > phy-mtk-hdmi-drv-y := phy-mtk-hdmi.o > > > phy-mtk-hdmi-drv-y += phy-mtk-hdmi- > > > mt2701.o > > > phy-mtk-hdmi-drv-y += phy-mtk-hdmi- > > > mt8173.o > > > +phy-mtk-hdmi-drv-y += phy-mtk-hdmi- > > > mt8195.o > > > obj-$(CONFIG_PHY_MTK_HDMI) += phy-mtk-hdmi-drv.o > > > > > > phy-mtk-mipi-dsi-drv-y := phy-mtk-mipi-dsi.o > > > diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c > > > b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c > > > new file mode 100644 > > > index 000000000000..149015b64c02 > > > --- /dev/null > > > +++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c > > > @@ -0,0 +1,673 @@ > > > +// SPDX-License-Identifier: GPL-2.0 > > > +/* > > > + * Copyright (c) 2021 MediaTek Inc. > > > + * Copyright (c) 2021 BayLibre, SAS > > > + */ > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > + > > > +#include "phy-mtk-hdmi.h" > > > +#include "phy-mtk-hdmi-mt8195.h" > > > + > > > +static void mtk_hdmi_ana_fifo_en(struct mtk_hdmi_phy *hdmi_phy) > > > +{ > > > + /* make data fifo writable for hdmi2.0 */ > > > + mtk_hdmi_phy_mask(hdmi_phy, HDMI_ANA_CTL, > > > REG_ANA_HDMI20_FIFO_EN, > > > + REG_ANA_HDMI20_FIFO_EN); > > > +} > > > + > > > +static void > > > +mtk_mt8195_phy_tmds_high_bit_clk_ratio(struct mtk_hdmi_phy > > > *hdmi_phy, > > > + bool enable) > > > +{ > > > + mtk_hdmi_ana_fifo_en(hdmi_phy); > > > + > > > + /* HDMI 2.0 specification, 3.4Gbps <= TMDS Bit Rate <= 6G, > > > + * clock bit ratio 1:40, under 3.4Gbps, clock bit ratio 1:10 > > > + */ > > > + if (enable) > > > + mtk_hdmi_phy_mask(hdmi_phy, HDMI20_CLK_CFG, > > > + 0x2 << REG_TXC_DIV_SHIFT, > > > > Use FIELD_PREP() macro, then no need define REG_TXC_DIV_SHIFT > > anymore. > > > > Didn't know about FIELD_* macros, will use them for V2. > > Thx for the suggestion. Please use helpers defined in phy-mtk-io.h, the register access helpers of mtk_hdmi_phy_* are already removed in phy next branch. Thanks a lot