From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC664C433EF for ; Wed, 20 Apr 2022 02:17:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358891AbiDTCTq (ORCPT ); Tue, 19 Apr 2022 22:19:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229791AbiDTCTq (ORCPT ); Tue, 19 Apr 2022 22:19:46 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6EE815A39; Tue, 19 Apr 2022 19:16:57 -0700 (PDT) X-UUID: 8409fd70d4b3458cb584da2a769e1a0c-20220420 X-UUID: 8409fd70d4b3458cb584da2a769e1a0c-20220420 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 870627283; Wed, 20 Apr 2022 10:16:51 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 20 Apr 2022 10:16:50 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 20 Apr 2022 10:16:50 +0800 Message-ID: Subject: Re: [PATCH 4/7] clk: mediatek: reset: Add reset.h From: Rex-BC Chen To: AngeloGioacchino Del Regno , , CC: , , , , , , , , , , , Date: Wed, 20 Apr 2022 10:16:50 +0800 In-Reply-To: <20eaaba7-19cb-8f1d-ecf4-bfac14d50f67@collabora.com> References: <20220418132154.7401-1-rex-bc.chen@mediatek.com> <20220418132154.7401-5-rex-bc.chen@mediatek.com> <20eaaba7-19cb-8f1d-ecf4-bfac14d50f67@collabora.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Tue, 2022-04-19 at 12:46 +0200, AngeloGioacchino Del Regno wrote: > Il 18/04/22 15:21, Rex-BC Chen ha scritto: > > Add a new file "reset.h" to place some definitions for clock reset. > > > > Signed-off-by: Rex-BC Chen > > --- > > drivers/clk/mediatek/clk-mtk.h | 10 +--------- > > drivers/clk/mediatek/reset.h | 20 ++++++++++++++++++++ > > 2 files changed, 21 insertions(+), 9 deletions(-) > > create mode 100644 drivers/clk/mediatek/reset.h > > > > diff --git a/drivers/clk/mediatek/clk-mtk.h > > b/drivers/clk/mediatek/clk-mtk.h > > index dafdf30fe94e..dfb0549ceb6c 100644 > > --- a/drivers/clk/mediatek/clk-mtk.h > > +++ b/drivers/clk/mediatek/clk-mtk.h > > @@ -12,6 +12,7 @@ > > #include > > #include > > #include > > +#include > > This should be > > #include "reset.h" > > ...since the header is in the same directory. > > Hello Angelo, I will fix this in next version. Thanks! BRs, Rex