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AJvYcCXphqOnJL+IHQDJNkpOp8HG/WAlsbrJFwtFT2Tt/THinO5HBwPhBd5yzhMCwcG3clD0DvbDs1DkQXs=@vger.kernel.org X-Gm-Message-State: AOJu0YwRV75Gp0goaE5fZ/QL6nDV3yg1Of8zUpbv4Sbc/h/jbtCOqSr7 A4GFdQfxVXE3wt/BpeREmnIMDpVMDY/h5c73DeDk9Jdn9yTX/f/igkZ8RLF06N4= X-Gm-Gg: ASbGnctuOXtjcLn9ZRXhbA0ZepN6eZUCFhv9ovZbs1rufT8XaICcoarUrjNvRRUuTdM IDOWLdL9MXSgavYnZTs6WTWUAokD1+OmeRIxUVZ0c79pXZ56+Uu+OuH5OjOVXU5CT29Nr7q9idd q61qtqaRksq4aImwOSkIppeVwG4A+mg9wlpZWs988WAQ4Hb1CexkzOBQKrxilltO0FNjbRXXw1B 97Y1JBTFSZPesEy/76JAJ8J16Tj4+XrroZeC08o3+fdj2VeEETbWRDPHso= X-Google-Smtp-Source: AGHT+IH6u6S3dLH84zc4slPIQPWBEWQFCdhlzXqKbsqdXDHKIEy3XG/pqMdZoy1Rfc/9UToO8A7ZbQ== X-Received: by 2002:a05:600c:3491:b0:434:f3d8:62d0 with SMTP id 5b1f17b1804b1-434f3d866b3mr41984585e9.3.1733746752835; Mon, 09 Dec 2024 04:19:12 -0800 (PST) Received: from [192.168.50.4] ([82.78.167.161]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434fc530a2dsm17998465e9.11.2024.12.09.04.19.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Dec 2024 04:19:12 -0800 (PST) Message-ID: Date: Mon, 9 Dec 2024 14:19:10 +0200 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 8/8] arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1 Content-Language: en-US To: Geert Uytterhoeven Cc: magnus.damm@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, p.zabel@pengutronix.de, lethal@linux-sh.org, g.liakhovetski@gmx.de, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, Claudiu Beznea References: <20241115134401.3893008-1-claudiu.beznea.uj@bp.renesas.com> <20241115134401.3893008-9-claudiu.beznea.uj@bp.renesas.com> From: Claudiu Beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, Geert, On 09.12.2024 12:44, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Fri, Nov 15, 2024 at 2:50 PM Claudiu wrote: >> From: Claudiu Beznea >> >> Add DT overlay for SCIF1 (of the Renesas RZ/G3S SoC) routed through the >> PMOD1_3A interface available on the Renesas RZ SMARC Carrier II board. >> >> Signed-off-by: Claudiu Beznea > > Thanks for your patch! > >> --- /dev/null >> +++ b/arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod.dtso >> @@ -0,0 +1,48 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Device Tree Source for the RZ/G3S SMARC Carrier II EVK PMOD parts > > So you plan to describe all 3 PMOD interfaces in a single overlay? > The board has: > 1. PMOD0 - Type-2A, > 2. PMOD1 - Tpye-3A, > 3. PMOD1 - Type 6A. > Wouldn't it be more convenient to have separate overlays for each port, > so you can more easily use them as e.g. Type-1(A) (GPIO only)? That would be better, indeed. > > BTW, naming both the second and third port "PMOD1" in the schematics, > and differentiating them by their type, was definitely a bad idea. > How can you distinguish between Type-1(A) on the second or third port? > >> + * >> + * Copyright (C) 2024 Renesas Electronics Corp. >> + * >> + * >> + * [Connection] >> + * >> + * SMARC Carrier II EVK >> + * +--------------------------------------------+ >> + * |PMOD1_3A (PMOD1 PIN HEADER) | >> + * | SCIF1_CTS# (pin1) (pin7) PMOD1_GPIO10 | >> + * | SCIF1_TXD (pin2) (pin8) PMOD1_GPIO11 | >> + * | SCIF1_RXD (pin3) (pin9) PMOD1_GPIO12 | >> + * | SCIF1_RTS# (pin4) (pin10) PMOD1_GPIO13 | >> + * | GND (pin5) (pin11) GND | >> + * | PWR_PMOD1 (pin6) (pin12) GND | >> + * +--------------------------------------------+ > > This depends not only on CONFIG_SW3 (for RXD only), but also on > SW_OPT_MUX4 (SW_SER0_PMOD=L gates all 4 SCIF1 signals). You're right! > While including "rzg3s-smarc-switches.h" for (out-of-tree) overlay > configfs is not really needed, please document the switches in the > comments. Sure! > As this is included in r9a08g045s33-smarc-pmod.dtb, you > may still want to include "rzg3s-smarc-switches.h". OK, I'll handle it in the next version. > >> + * >> + */ >> + >> +/dts-v1/; >> +/plugin/; >> + >> +#include >> + >> +&{/} { >> + aliases { >> + serial0 = "/soc/serial@1004bc00"; > > Note that configuring aliases doesn't work in dynamic overlays > (but we don't care in upstream). > However, this is also wired on the Carrier board to the M2 slot when > SW_SER0_PMOD is low. so I think it makes sense to have the alias > unconditionally in rzg3s-smarc.dtsi instead. OK, I'll move it there. Thank you for your review, Claudiu > >> + }; > > Gr{oetje,eeting}s, > > Geert >