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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53bc0d6fceesm215634e87.281.2024.10.30.03.59.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 03:59:07 -0700 (PDT) Message-ID: Date: Wed, 30 Oct 2024 12:59:06 +0200 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/6] dt-bindings: clock: qcom: Add GPU clocks for QCS8300 Content-Language: en-US To: Krzysztof Kozlowski , Imran Shaik Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ajit Pandey , Taniya Das , Jagadeesh Kona , Satya Priya Kakitapalli , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241024-qcs8300-mm-patches-v2-0-76c905060d0a@quicinc.com> <20241024-qcs8300-mm-patches-v2-1-76c905060d0a@quicinc.com> From: Vladimir Zapolskiy In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/26/24 15:20, Krzysztof Kozlowski wrote: > On Thu, Oct 24, 2024 at 07:01:14PM +0530, Imran Shaik wrote: >> The QCS8300 GPU clock controller is mostly identical to SA8775P, but >> QCS8300 has few additional clocks and minor differences. Hence, reuse >> SA8775P gpucc bindings and add additional clocks required for QCS8300. > > IIUC, these clocks are not valid for SA8775p. How do we deal with such > cases for other Qualcomm SoCs? > It always possible to add a new platform specific header file and include the old one. For reference see commit a6a61b9701d1 ("dt-bindings: clock: qcom: Add SM8650 video clock controller"), I believe that's the preferred way of adding new platform clocks whenever technically possible. -- Best wishes, Vladimir