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From: Jon Hunter <jonathanh@nvidia.com>
To: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Ajit Pandey <quic_ajipan@quicinc.com>,
	Taniya Das <quic_tdas@quicinc.com>,
	Imran Shaik <quic_imrashai@quicinc.com>,
	Jagadeesh Kona <quic_jkona@quicinc.com>,
	Dan Carpenter <dan.carpenter@linaro.org>,
	Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
	kernel test robot <lkp@intel.com>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val()
Date: Fri, 6 Sep 2024 15:14:04 +0100	[thread overview]
Message-ID: <fdeadc0c-7f8d-4547-8703-c402bf06e495@nvidia.com> (raw)
In-Reply-To: <20240906113905.641336-1-quic_skakitap@quicinc.com>


On 06/09/2024 12:39, Satya Priya Kakitapalli wrote:
> In zonda_pll_adjust_l_val() replace the divide operator with comparison
> operator to fix below build error and smatch warning.
> 
> drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
> clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'
> 
> smatch warnings:
> drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace
> divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate'
> 
> Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL")
> Reported-by: Jon Hunter <jonathanh@nvidia.com>
> Reported-by: kernel test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
> Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
> ---
>   drivers/clk/qcom/clk-alpha-pll.c | 4 +---
>   1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 019713c38f25..f9105443d7db 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32
>   
>   	quotient = rate;
>   	remainder = do_div(quotient, prate);
> -	*l = quotient;
>   
> -	if ((remainder * 2) / prate)
> -		*l = *l + 1;
> +	*l = rate + (u32)(remainder * 2 >= prate);
>   }
>   
>   static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate,


Tested-by: Jon Hunter <jonathanh@nvidia.com>

Thanks!
Jon

-- 
nvpublic

  parent reply	other threads:[~2024-09-06 14:14 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-06 11:39 [PATCH V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val() Satya Priya Kakitapalli
2024-09-06 12:46 ` Vladimir Zapolskiy
2024-09-06 14:14 ` Jon Hunter [this message]
2024-09-09 10:57   ` Jon Hunter
2024-09-09 21:08     ` Stephen Boyd

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