From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB4E7C433F5 for ; Mon, 1 Nov 2021 10:27:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A407661058 for ; Mon, 1 Nov 2021 10:27:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232053AbhKAKaG (ORCPT ); Mon, 1 Nov 2021 06:30:06 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:49203 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232017AbhKAKaF (ORCPT ); Mon, 1 Nov 2021 06:30:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1635762451; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sbRv0LbOwweVcKPem1CDYmre/eBu7RPmgKjL80bCTNo=; b=L0vEIW8YoAmHcoztbqAS04R1wc0VrAoOZH7LBK+6Ps0HOvLcbrlKwBjUti4JsTGwzPAW1V I2YuPt16xjO5OD5ufdRpKt7ECJCT4+6vnEXlWgRj12mqp6AOaJbBCYgKfD724kWT+UvFt1 wbEe/CPGO6sl7ZNk8ydah2Yn32zTAas= Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-598-jkoCEJX_PhmlUHuyUVgVbg-1; Mon, 01 Nov 2021 06:27:30 -0400 X-MC-Unique: jkoCEJX_PhmlUHuyUVgVbg-1 Received: by mail-ed1-f71.google.com with SMTP id g3-20020a056402424300b003e2981e1edbso602291edb.3 for ; Mon, 01 Nov 2021 03:27:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=sbRv0LbOwweVcKPem1CDYmre/eBu7RPmgKjL80bCTNo=; b=F4BjKYAraCWzMYfCOBu4FrsavGoxgY3wGGvbUagl+ebtpDY3aAvtrMwfEvDbRvpzC3 9EjbrC12jUxKbBIUo0AVl7GAscogydqz7IJN1xLBIlnG7Cskya5SxVMHMutgSf1f3t/E 4R2FLfOExDieGf4H9EsBloByRroTDCRzsxyK7CpBVpd1hq+dJgE1i0RVqbM7kfdz0diU 6B68OD9Xkp0DrmJb5rJQAwFHkWDVjnNeYVSd2HFVaoNztAtgbvSJU18j/T+VCwu0OkxE FuIMT8VI78AS7mnyW3YotjcUir8CTrFXKx0vUtbaozsZ4P69fnpD9XT24g1zQnyOh3yF fGOw== X-Gm-Message-State: AOAM532Uw4jZpGwXbX7fFcRyhwvfWYK5J9X3zSJE5guy4dVFjPy12H7I ygYG73iH/7UJI6JRtWYE4iWmHrtj0pVU0ocxZA0cYDOLBqQXAU9cGUsdqPg8EDIHoBNdN/Bgw+n cUg/2qRZxp3179+pnl9R2 X-Received: by 2002:a17:907:96a4:: with SMTP id hd36mr723473ejc.407.1635762449536; Mon, 01 Nov 2021 03:27:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJze8NyVmpBw7YgYiWD+CZnyOJgLe1lkQHSyHpWXs1dtzDSwFrSGxpNbxzdwHMmlXFZDjJJAyA== X-Received: by 2002:a17:907:96a4:: with SMTP id hd36mr723456ejc.407.1635762449305; Mon, 01 Nov 2021 03:27:29 -0700 (PDT) Received: from [10.40.1.223] ([81.30.35.201]) by smtp.gmail.com with ESMTPSA id d3sm6726825ejb.35.2021.11.01.03.27.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 01 Nov 2021 03:27:29 -0700 (PDT) Message-ID: Date: Mon, 1 Nov 2021 11:27:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Subject: Re: [PATCH v4 05/11] clk: Introduce clk-tps68470 driver Content-Language: en-US To: Andy Shevchenko Cc: "Rafael J . Wysocki" , Mark Gross , Andy Shevchenko , Wolfram Sang , Mika Westerberg , Daniel Scally , Laurent Pinchart , Mauro Carvalho Chehab , Liam Girdwood , Mark Brown , Michael Turquette , Stephen Boyd , Len Brown , ACPI Devel Maling List , Platform Driver , Linux Kernel Mailing List , linux-i2c , Sakari Ailus , Kate Hsuan , Linux Media Mailing List , linux-clk References: <20211025094119.82967-1-hdegoede@redhat.com> <20211025094119.82967-6-hdegoede@redhat.com> From: Hans de Goede In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi, On 10/25/21 13:24, Andy Shevchenko wrote: > On Mon, Oct 25, 2021 at 12:42 PM Hans de Goede wrote: >> >> The TPS68470 PMIC provides Clocks, GPIOs and Regulators. At present in >> the kernel the Regulators and Clocks are controlled by an OpRegion >> driver designed to work with power control methods defined in ACPI, but >> some platforms lack those methods, meaning drivers need to be able to >> consume the resources of these chips through the usual frameworks. >> >> This commit adds a driver for the clocks provided by the tps68470, >> and is designed to bind to the platform_device registered by the >> intel_skl_int3472 module. > > ... > >> +/* >> + * The PLL is used to multiply the crystal oscillator >> + * frequency range of 3 MHz to 27 MHz by a programmable >> + * factor of F = (M/N)*(1/P) such that the output >> + * available at the HCLK_A or HCLK_B pins are in the range >> + * of 4 MHz to 64 MHz in increments of 0.1 MHz > > Missed (grammatical) period. Thx, fixed for v5. > >> + * >> + * hclk_# = osc_in * (((plldiv*2)+320) / (xtaldiv+30)) * (1 / 2^postdiv) >> + * >> + * PLL_REF_CLK should be as close as possible to 100kHz >> + * PLL_REF_CLK = input clk / XTALDIV[7:0] + 30) >> + * >> + * PLL_VCO_CLK = (PLL_REF_CLK * (plldiv*2 + 320)) >> + * >> + * BOOST should be as close as possible to 2Mhz >> + * BOOST = PLL_VCO_CLK / (BOOSTDIV[4:0] + 16) * >> + * >> + * BUCK should be as close as possible to 5.2Mhz >> + * BUCK = PLL_VCO_CLK / (BUCKDIV[3:0] + 5) >> + * >> + * osc_in xtaldiv plldiv postdiv hclk_# >> + * 20Mhz 170 32 1 19.2Mhz >> + * 20Mhz 170 40 1 20Mhz >> + * 20Mhz 170 80 1 24Mhz > >> + * > > Redundant empty line. Removed for v5. >> + */ > > ... > >> + /* disable clock first */ > > Disable > first... > >> + /* and then tri-state the clock outputs */ > > ...and Fixed for v5. > ... > >> + for (i = 0; i < ARRAY_SIZE(clk_freqs); i++) { >> + diff = clk_freqs[i].freq - rate; >> + if (diff == 0) >> + return i; > >> + diff = abs(diff); > > This needs a comment why higher (lower) frequency is okay. This function is called in 2 places: 1. From tps68470_clk_round_rate(), where higher/lower clearly is ok, (see the function name) so no comment needed. 2. From tps68470_clk_set_rate() where it is NOT ok and this is enforced in the caller: unsigned int idx = tps68470_clk_cfg_lookup(rate); if (rate != clk_freqs[idx].freq) return -EINVAL; This is not easy to describe in a comment, while being obvious if someone looking at this actually looks at the callers. > >> + if (diff < best_diff) { >> + best_diff = diff; >> + best_idx = i; >> + } >> + } > > ... > >> + if (pdata) { >> + ret = devm_clk_hw_register_clkdev(&pdev->dev, >> + &tps68470_clkdata->clkout_hw, >> + pdata->consumer_con_id, >> + pdata->consumer_dev_name); > > if (ret) > return ret; > >> + } >> + >> + return ret; > > return 0; That was the code in v2, but Stephen (the clk maintainer) asked to simplify it to its current form, so I'm not going to change this back. Regards, Hans