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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id q22-20020a194316000000b00517626d22dcsm334073lfa.29.2024.04.10.11.46.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Apr 2024 11:46:42 -0700 (PDT) Message-ID: Date: Wed, 10 Apr 2024 20:46:41 +0200 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/4] clk: qcom: dispcc: fix DisplayPort link clocks To: Dmitry Baryshkov , Bjorn Andersson , Michael Turquette , Stephen Boyd , Konrad Dybcio , Neil Armstrong Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240408-dispcc-dp-clocks-v1-0-f9e44902c28d@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20240408-dispcc-dp-clocks-v1-0-f9e44902c28d@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/8/24 13:47, Dmitry Baryshkov wrote: > On several Qualcomm platforms DisplayPort link clocks used incorrect > frequency tables. Drop frequency tables and use clk_byte2_ops instead of > clk_rcg2_ops. > > Note, this was tested on SM8450 only and then extended to other > platforms. > > Signed-off-by: Dmitry Baryshkov > --- Reviewed-by: Konrad Dybcio Konrad