From: sashiko-bot@kernel.org
To: "Florian Fainelli" <f.fainelli@gmail.com>
Cc: "open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v5 2/4] MIPS: Skip generic IPI setup for platform-specific callbacks
Date: Fri, 13 Nov 2026 19:00:27 +0000 [thread overview]
Message-ID: <sashiko-outbox-213490@kernel.org> (raw)
In-Reply-To: <20261113184210.470320-3-f.fainelli@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] MIPS: smp: missing Signed-off-by trailer in commit message
--
commit c5c283e69afb709a8e47e1279441d01d98c9d98c
Author: Florian Fainelli <f.fainelli@gmail.com>
> MIPS: Skip generic IPI setup for platform-specific callbacks
>
> A generic MIPS kernel can select a platform SMP backend with direct IPI
> callbacks instead of an IPI IRQ domain. The XBurst backend uses CP0
> mailboxes, so generic IPI allocation would find no domain and BUG when
> more than one CPU is present.
>
> Skip generic IPI initialization when neither selected send callback uses
> the generic implementation. Keep initialization when either callback
> uses generic IRQ IPIs, and retain the existing single-CPU shortcut.
>
> Sashiko AI reported the XBurst integration issue; Codex assisted with
> the change and extracted-function/build checks.
[Severity: High]
The commit message is missing a Signed-off-by trailer, which is required
under the Developer's Certificate of Origin before the patch can be
applied.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261113184210.470320-1-f.fainelli@gmail.com?part=2
next prev parent reply other threads:[~2026-11-13 19:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 18:42 [PATCH v5 0/4] MIPS: CI20: Enable SMP with two CPUs Florian Fainelli
2026-11-13 18:42 ` [PATCH v5 1/4] clk: ingenic: Poll JZ4780 CPU1 power status atomically Florian Fainelli
2026-11-13 18:42 ` [PATCH v5 2/4] MIPS: Skip generic IPI setup for platform-specific callbacks Florian Fainelli
2026-11-13 18:43 ` Florian Fainelli
2026-11-13 19:00 ` sashiko-bot [this message]
2026-11-13 18:42 ` [PATCH v5 3/4] MIPS: Ingenic: Add XBurst SMP support Florian Fainelli
2026-11-13 18:42 ` [PATCH v5 4/4] MIPS: CI20: Enable SMP with two CPUs Florian Fainelli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=sashiko-outbox-213490@kernel.org \
--to=sashiko-bot@kernel.org \
--cc=f.fainelli@gmail.com \
--cc=linux-clk@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox