From: sashiko-bot@kernel.org
To: "Ettore Chimenti" <ettore.chimenti@linaro.org>
Cc: linux-clk@vger.kernel.org
Subject: Re: [PATCH v3 4/4] ARM: OMAP2+: ti81xx: use non-scalable voltage domains
Date: Fri, 13 Nov 2026 21:44:23 +0000 [thread overview]
Message-ID: <sashiko-outbox-213731@kernel.org> (raw)
In-Reply-To: <20261113-patch-ektor5-dm8168-clk-v3-4-a42cd1edc5f3@linaro.org>
Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] ARM: OMAP2+: missing dsp/iva voltagedomains in
omap3xxx_voltagedomains_init()
--
commit f91d235b9b0b435b6fa907b15b6dbcc1322df372
Author: Ettore Chimenti <ettore.chimenti@linaro.org>
ARM: OMAP2+: ti81xx: use non-scalable voltage domains
This commit switches TI81xx SoCs to register the non-scalable
voltagedomains_am35xx array in omap3xxx_voltagedomains_init() instead of
voltagedomains_omap3.
> diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
> index e98a3f289c27a..478f5eb2a17f4 100644
> --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
> +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
> @@ -119,7 +119,7 @@ void __init omap3xxx_voltagedomains_init(void)
> omap3_voltdm_mpu.vc_param = &omap3_mpu_vc_data;
> omap3_voltdm_core.vc_param = &omap3_core_vc_data;
>
> - if (soc_is_am35xx())
> + if (soc_is_am35xx() || soc_is_ti81xx())
> voltdms = voltagedomains_am35xx;
[Severity: Medium]
Does voltagedomains_am35xx provide all the voltage domains needed by the
DM814x powerdomains?
voltagedomains_am35xx only registers the "mpu_iva", "core" and "wakeup"
domains. On DM814x, powerdomains_ti814x also includes gem_814x_pwrdm and
hdvpss_814x_pwrdm (with .voltdm.name = "dsp") as well as ivahd_814x_pwrdm
(with .voltdm.name = "iva"). Because ti81xx_pwrdm_operations does not
set .pwrdm_has_voltdm, omap3xxx_powerdomains_init() -> _pwrdm_register()
calls voltdm_lookup() for each domain, which fails with -EINVAL and leaves
those three powerdomains unregistered on DM814x.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261113-patch-ektor5-dm8168-clk-v3-0-a42cd1edc5f3@linaro.org?part=4
next prev parent reply other threads:[~2026-11-13 21:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 21:30 [PATCH v3 0/4] clk: ti: fapll/dm816x: clock tree and calculation fixes Ettore Chimenti
2026-11-13 21:30 ` [PATCH v3 1/4] clk: ti: fapll: remove ti_dt_clk_name helper Ettore Chimenti
2026-11-13 21:30 ` [PATCH v3 2/4] clk: ti: fapll: Fix clock speed calculation Ettore Chimenti
2026-11-13 21:30 ` [PATCH v3 3/4] clk: ti: fapll: print clock name that fails to register Ettore Chimenti
2026-11-13 21:30 ` [PATCH v3 4/4] ARM: OMAP2+: ti81xx: use non-scalable voltage domains Ettore Chimenti
2026-11-13 21:44 ` sashiko-bot [this message]
2026-11-13 22:02 ` Andreas Kemnade
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