From: Brijesh Singh <brijesh.singh@amd.com>
To: <x86@kernel.org>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>, <linux-efi@vger.kernel.org>,
<platform-driver-x86@vger.kernel.org>,
<linux-coco@lists.linux.dev>, <linux-mm@kvack.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Joerg Roedel <jroedel@suse.de>,
Tom Lendacky <thomas.lendacky@amd.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Ard Biesheuvel <ardb@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
Jim Mattson <jmattson@google.com>,
"Andy Lutomirski" <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Sergio Lopez <slp@redhat.com>, Peter Gonda <pgonda@google.com>,
"Peter Zijlstra" <peterz@infradead.org>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
David Rientjes <rientjes@google.com>,
Dov Murik <dovmurik@linux.ibm.com>,
Tobin Feldman-Fitzthum <tobin@ibm.com>,
Borislav Petkov <bp@alien8.de>,
Michael Roth <michael.roth@amd.com>,
Vlastimil Babka <vbabka@suse.cz>,
"Kirill A . Shutemov" <kirill@shutemov.name>,
Andi Kleen <ak@linux.intel.com>,
"Dr . David Alan Gilbert" <dgilbert@redhat.com>,
<brijesh.ksingh@gmail.com>, <tony.luck@intel.com>,
<marcorr@google.com>,
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: [PATCH v10 38/45] x86/sev: Add SEV-SNP feature detection/setup
Date: Wed, 9 Feb 2022 12:10:32 -0600 [thread overview]
Message-ID: <20220209181039.1262882-39-brijesh.singh@amd.com> (raw)
In-Reply-To: <20220209181039.1262882-1-brijesh.singh@amd.com>
From: Michael Roth <michael.roth@amd.com>
Initial/preliminary detection of SEV-SNP is done via the Confidential
Computing blob. Check for it prior to the normal SEV/SME feature
initialization, and add some sanity checks to confirm it agrees with
SEV-SNP CPUID/MSR bits.
Signed-off-by: Michael Roth <michael.roth@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
arch/x86/boot/compressed/sev.c | 27 -------------
arch/x86/include/asm/sev.h | 2 +
arch/x86/kernel/sev-shared.c | 27 +++++++++++++
arch/x86/kernel/sev.c | 64 ++++++++++++++++++++++++++++++
arch/x86/mm/mem_encrypt_identity.c | 8 ++++
5 files changed, 101 insertions(+), 27 deletions(-)
diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c
index 2a48f3a3f372..2911137bf37f 100644
--- a/arch/x86/boot/compressed/sev.c
+++ b/arch/x86/boot/compressed/sev.c
@@ -352,33 +352,6 @@ static struct cc_blob_sev_info *find_cc_blob_efi(struct boot_params *bp)
EFI_CC_BLOB_GUID);
}
-struct cc_setup_data {
- struct setup_data header;
- u32 cc_blob_address;
-};
-
-/*
- * Search for a Confidential Computing blob passed in as a setup_data entry
- * via the Linux Boot Protocol.
- */
-static struct cc_blob_sev_info *find_cc_blob_setup_data(struct boot_params *bp)
-{
- struct cc_setup_data *sd = NULL;
- struct setup_data *hdr;
-
- hdr = (struct setup_data *)bp->hdr.setup_data;
-
- while (hdr) {
- if (hdr->type == SETUP_CC_BLOB) {
- sd = (struct cc_setup_data *)hdr;
- return (struct cc_blob_sev_info *)(unsigned long)sd->cc_blob_address;
- }
- hdr = (struct setup_data *)hdr->next;
- }
-
- return NULL;
-}
-
/*
* Initial set up of SNP relies on information provided by the
* Confidential Computing blob, which can be passed to the boot kernel
diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h
index 4e3909042001..219abb4590f2 100644
--- a/arch/x86/include/asm/sev.h
+++ b/arch/x86/include/asm/sev.h
@@ -153,6 +153,7 @@ void snp_set_memory_shared(unsigned long vaddr, unsigned int npages);
void snp_set_memory_private(unsigned long vaddr, unsigned int npages);
void snp_set_wakeup_secondary_cpu(void);
bool snp_init(struct boot_params *bp);
+void snp_abort(void);
#else
static inline void sev_es_ist_enter(struct pt_regs *regs) { }
static inline void sev_es_ist_exit(void) { }
@@ -171,6 +172,7 @@ static inline void snp_set_memory_shared(unsigned long vaddr, unsigned int npage
static inline void snp_set_memory_private(unsigned long vaddr, unsigned int npages) { }
static inline void snp_set_wakeup_secondary_cpu(void) { }
static inline bool snp_init(struct boot_params *bp) { return false; }
+static inline void snp_abort(void) { }
#endif
#endif
diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c
index 0f1375164ff0..a7a1c0fb298e 100644
--- a/arch/x86/kernel/sev-shared.c
+++ b/arch/x86/kernel/sev-shared.c
@@ -937,3 +937,30 @@ static enum es_result vc_handle_rdtsc(struct ghcb *ghcb,
return ES_OK;
}
+
+struct cc_setup_data {
+ struct setup_data header;
+ u32 cc_blob_address;
+};
+
+/*
+ * Search for a Confidential Computing blob passed in as a setup_data entry
+ * via the Linux Boot Protocol.
+ */
+static struct cc_blob_sev_info *find_cc_blob_setup_data(struct boot_params *bp)
+{
+ struct cc_setup_data *sd = NULL;
+ struct setup_data *hdr;
+
+ hdr = (struct setup_data *)bp->hdr.setup_data;
+
+ while (hdr) {
+ if (hdr->type == SETUP_CC_BLOB) {
+ sd = (struct cc_setup_data *)hdr;
+ return (struct cc_blob_sev_info *)(unsigned long)sd->cc_blob_address;
+ }
+ hdr = (struct setup_data *)hdr->next;
+ }
+
+ return NULL;
+}
diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c
index b876b1d989eb..a79ddacf0478 100644
--- a/arch/x86/kernel/sev.c
+++ b/arch/x86/kernel/sev.c
@@ -1984,3 +1984,67 @@ bool __init handle_vc_boot_ghcb(struct pt_regs *regs)
while (true)
halt();
}
+
+/*
+ * Initial set up of SNP relies on information provided by the
+ * Confidential Computing blob, which can be passed to the kernel
+ * in the following ways, depending on how it is booted:
+ *
+ * - when booted via the boot/decompress kernel:
+ * - via boot_params
+ *
+ * - when booted directly by firmware/bootloader (e.g. CONFIG_PVH):
+ * - via a setup_data entry, as defined by the Linux Boot Protocol
+ *
+ * Scan for the blob in that order.
+ */
+static __init struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp)
+{
+ struct cc_blob_sev_info *cc_info;
+
+ /* Boot kernel would have passed the CC blob via boot_params. */
+ if (bp->cc_blob_address) {
+ cc_info = (struct cc_blob_sev_info *)(unsigned long)bp->cc_blob_address;
+ goto found_cc_info;
+ }
+
+ /*
+ * If kernel was booted directly, without the use of the
+ * boot/decompression kernel, the CC blob may have been passed via
+ * setup_data instead.
+ */
+ cc_info = find_cc_blob_setup_data(bp);
+ if (!cc_info)
+ return NULL;
+
+found_cc_info:
+ if (cc_info->magic != CC_BLOB_SEV_HDR_MAGIC)
+ snp_abort();
+
+ return cc_info;
+}
+
+bool __init snp_init(struct boot_params *bp)
+{
+ struct cc_blob_sev_info *cc_info;
+
+ if (!bp)
+ return false;
+
+ cc_info = find_cc_blob(bp);
+ if (!cc_info)
+ return false;
+
+ /*
+ * The CC blob will be used later to access the secrets page. Cache
+ * it here like the boot kernel does.
+ */
+ bp->cc_blob_address = (u32)(unsigned long)cc_info;
+
+ return true;
+}
+
+void __init snp_abort(void)
+{
+ sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);
+}
diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
index 3f0abb403340..2f723e106ed3 100644
--- a/arch/x86/mm/mem_encrypt_identity.c
+++ b/arch/x86/mm/mem_encrypt_identity.c
@@ -44,6 +44,7 @@
#include <asm/setup.h>
#include <asm/sections.h>
#include <asm/cmdline.h>
+#include <asm/sev.h>
#include "mm_internal.h"
@@ -508,8 +509,11 @@ void __init sme_enable(struct boot_params *bp)
bool active_by_default;
unsigned long me_mask;
char buffer[16];
+ bool snp;
u64 msr;
+ snp = snp_init(bp);
+
/* Check for the SME/SEV support leaf */
eax = 0x80000000;
ecx = 0;
@@ -541,6 +545,10 @@ void __init sme_enable(struct boot_params *bp)
sev_status = __rdmsr(MSR_AMD64_SEV);
feature_mask = (sev_status & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
+ /* The SEV-SNP CC blob should never be present unless SEV-SNP is enabled. */
+ if (snp && !(sev_status & MSR_AMD64_SEV_SNP_ENABLED))
+ snp_abort();
+
/* Check if memory encryption is enabled */
if (feature_mask == AMD_SME_BIT) {
/*
--
2.25.1
next prev parent reply other threads:[~2022-02-09 18:12 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 18:09 [PATCH v10 00/45] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Brijesh Singh
2022-02-09 18:09 ` [PATCH v10 01/45] KVM: SVM: Define sev_features and vmpl field in the VMSA Brijesh Singh
2022-02-09 18:09 ` [PATCH v10 02/45] KVM: SVM: Create a separate mapping for the SEV-ES save area Brijesh Singh
2022-02-09 18:09 ` [PATCH v10 03/45] KVM: SVM: Create a separate mapping for the GHCB " Brijesh Singh
2022-02-09 18:09 ` [PATCH v10 04/45] KVM: SVM: Update the SEV-ES save area mapping Brijesh Singh
2022-02-09 18:09 ` [PATCH v10 05/45] x86/boot: Introduce helpers for MSR reads/writes Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 06/45] x86/boot: Use MSR read/write helpers instead of inline assembly Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 07/45] x86/compressed/64: Detect/setup SEV/SME features earlier in boot Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 08/45] x86/sev: " Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 09/45] x86/mm: Extend cc_attr to include AMD SEV-SNP Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 10/45] x86/sev: Define the Linux specific guest termination reasons Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 11/45] x86/sev: Save the negotiated GHCB version Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 12/45] x86/sev: Check SEV-SNP features support Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 13/45] x86/sev: Add a helper for the PVALIDATE instruction Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 14/45] x86/sev: Check the vmpl level Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 15/45] x86/compressed: Add helper for validating pages in the decompression stage Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 16/45] x86/compressed: Register GHCB memory when SEV-SNP is active Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 17/45] x86/sev: " Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 18/45] x86/sev: Add helper for validating pages in early enc attribute changes Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 19/45] x86/kernel: Make the .bss..decrypted section shared in RMP table Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 20/45] x86/kernel: Validate ROM memory before accessing when SEV-SNP is active Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 21/45] x86/mm: Add support to validate memory when changing C-bit Brijesh Singh
2022-02-10 16:48 ` Borislav Petkov
2022-02-11 14:55 ` Borislav Petkov
2022-02-11 17:27 ` Brijesh Singh
2022-02-13 12:15 ` Borislav Petkov
2022-02-13 14:50 ` Tom Lendacky
2022-02-13 17:21 ` Borislav Petkov
2022-02-15 12:43 ` Kirill A. Shutemov
2022-02-15 12:54 ` Borislav Petkov
2022-02-15 13:15 ` Kirill A. Shutemov
2022-02-15 14:41 ` Borislav Petkov
2022-02-16 13:32 ` Borislav Petkov
2022-02-09 18:10 ` [PATCH v10 22/45] x86/sev: Use SEV-SNP AP creation to start secondary CPUs Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 23/45] x86/head/64: Re-enable stack protection Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 24/45] x86/compressed/acpi: Move EFI detection to helper Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 25/45] x86/compressed/acpi: Move EFI system table lookup " Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 26/45] x86/compressed/acpi: Move EFI config " Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 27/45] x86/compressed/acpi: Move EFI vendor " Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 28/45] x86/compressed/acpi: Move EFI kexec handling into common code Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 29/45] x86/boot: Add Confidential Computing type to setup_data Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 30/45] KVM: x86: Move lookup of indexed CPUID leafs to helper Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 31/45] x86/sev: Move MSR-based VMGEXITs for CPUID " Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 32/45] x86/compressed/64: Add support for SEV-SNP CPUID table in #VC handlers Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 33/45] x86/boot: Add a pointer to Confidential Computing blob in bootparams Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 34/45] x86/compressed: Add SEV-SNP feature detection/setup Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 35/45] x86/compressed: Use firmware-validated CPUID leaves for SEV-SNP guests Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 36/45] x86/compressed: Export and rename add_identity_map() Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 37/45] x86/compressed/64: Add identity mapping for Confidential Computing blob Brijesh Singh
2022-02-09 18:10 ` Brijesh Singh [this message]
2022-02-09 18:10 ` [PATCH v10 39/45] x86/sev: Use firmware-validated CPUID for SEV-SNP guests Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 40/45] x86/sev: Provide support for SNP guest request NAEs Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 41/45] x86/sev: Register SEV-SNP guest request platform device Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 42/45] virt: Add SEV-SNP guest driver Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 43/45] virt: sevguest: Add support to derive key Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 44/45] virt: sevguest: Add support to get extended report Brijesh Singh
2022-02-09 18:10 ` [PATCH v10 45/45] virt: sevguest: Add documentation for SEV-SNP CPUID Enforcement Brijesh Singh
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220209181039.1262882-39-brijesh.singh@amd.com \
--to=brijesh.singh@amd.com \
--cc=ak@linux.intel.com \
--cc=ardb@kernel.org \
--cc=bp@alien8.de \
--cc=brijesh.ksingh@gmail.com \
--cc=dave.hansen@linux.intel.com \
--cc=dgilbert@redhat.com \
--cc=dovmurik@linux.ibm.com \
--cc=hpa@zytor.com \
--cc=jmattson@google.com \
--cc=jroedel@suse.de \
--cc=kirill@shutemov.name \
--cc=kvm@vger.kernel.org \
--cc=linux-coco@lists.linux.dev \
--cc=linux-efi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=luto@kernel.org \
--cc=marcorr@google.com \
--cc=michael.roth@amd.com \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=pgonda@google.com \
--cc=platform-driver-x86@vger.kernel.org \
--cc=rientjes@google.com \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=seanjc@google.com \
--cc=slp@redhat.com \
--cc=srinivas.pandruvada@linux.intel.com \
--cc=tglx@linutronix.de \
--cc=thomas.lendacky@amd.com \
--cc=tobin@ibm.com \
--cc=tony.luck@intel.com \
--cc=vbabka@suse.cz \
--cc=vkuznets@redhat.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).