From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from wout4-smtp.messagingengine.com (wout4-smtp.messagingengine.com [64.147.123.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48B68271F3 for ; Tue, 16 May 2023 21:52:16 +0000 (UTC) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id 5195232004ED; Tue, 16 May 2023 17:52:13 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Tue, 16 May 2023 17:52:15 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=shutemov.name; h=cc:cc:content-transfer-encoding:content-type:content-type :date:date:from:from:in-reply-to:in-reply-to:message-id :mime-version:references:reply-to:sender:subject:subject:to:to; s=fm2; t=1684273932; x=1684360332; bh=1mTVN0zWdMUI2lVaj0xdpaB12 1fz73d+fGcmjELhUZk=; b=Kl0XuJ/7rIR0raL3yWB6485sHqvMnmL2RGcc3l/D9 XK1ozRr20oXtM/pkqnBga8x4OZiLPdkuPeTcya8KxrKOuPaNK5iHbd4Z1EfybFu3 0DDU9lqBFLxnxgs2FIk0IkREbJWAQj8SQu69lVMsFNSinDaNr7+6YKEGkl0ArOeL WjkXcV0svcu/tIpvgKROlYgnBURRbckLIi2BheWDrl22IkmeFR2gVtBeLcYiHP+9 P4VYisa62yS4Hc8fGJNZur83EFykS5LoZtQBEELJqrPmzbDKV3tnKL1Zg49vLGLP g+CA3o3bvf7hNejFutszhr6Jj5xTXDo23+vvjZCejsIQQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t= 1684273932; x=1684360332; bh=1mTVN0zWdMUI2lVaj0xdpaB121fz73d+fGc mjELhUZk=; b=tU+ViBfmK/un/Lo4Z03YcEyAbW/0SFOQJJQx4AsI0E3jnBxx2qh 3IhxNCJHYBpozyEtOjb4guShzBj+bzhNjwYnaf8WC/xaaaqmzo8h6WBd/AljRtsX 4vwVFQh1hDr8N8xyZzq+0OKOd3AsfE+ePvrvheZMPnbxiS61ULC7E/aL2Z8Xe9Sm P3PSHT4we7zgEtV2JALq1pRJkuUTUVvonLkRNTKfvow6RYAIqHVVr6PZiZ3gW7VW 3qphfT70JBf7jMKYx45+krDE9y3XOz3bWfEjd6yyg/ZUUVYiOfT+If7yNuQGsP9Y heX0TB/zA0TetA7lPy5AKDqoxaA7G2KUkig== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrfeehledgudeiiecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpeffhffvvefukfhfgggtugfgjgesthektddttddtjeenucfhrhhomhepfdfm ihhrihhllhcutedrucfuhhhuthgvmhhovhdfuceokhhirhhilhhlsehshhhuthgvmhhovh drnhgrmhgvqeenucggtffrrghtthgvrhhnpefgjeeikefffeefvedugfdtkedvhfdttdei feevtdehgefgjeffleelgffggfdvkeenucevlhhushhtvghrufhiiigvpedtnecurfgrrh grmhepmhgrihhlfhhrohhmpehkihhrihhllhesshhhuhhtvghmohhvrdhnrghmvg X-ME-Proxy: Feedback-ID: ie3994620:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 16 May 2023 17:52:12 -0400 (EDT) Received: by box.shutemov.name (Postfix, from userid 1000) id 480C510C8C1; Wed, 17 May 2023 00:52:10 +0300 (+03) Date: Wed, 17 May 2023 00:52:10 +0300 From: "Kirill A. Shutemov" To: Dave Hansen Cc: Ard Biesheuvel , "Kirill A. Shutemov" , Borislav Petkov , Andy Lutomirski , Sean Christopherson , Andrew Morton , Joerg Roedel , Andi Kleen , Kuppuswamy Sathyanarayanan , David Rientjes , Vlastimil Babka , Tom Lendacky , Thomas Gleixner , Peter Zijlstra , Paolo Bonzini , Ingo Molnar , Dario Faggioli , Mike Rapoport , David Hildenbrand , Mel Gorman , marcelo.cerri@canonical.com, tim.gardner@canonical.com, khalid.elmously@canonical.com, philip.cox@canonical.com, aarcange@redhat.com, peterx@redhat.com, x86@kernel.org, linux-mm@kvack.org, linux-coco@lists.linux.dev, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, Dave Hansen Subject: Re: [PATCHv11 6/9] efi/unaccepted: Avoid load_unaligned_zeropad() stepping into unaccepted memory Message-ID: <20230516215210.pviqojbr5o4hd6bb@box.shutemov.name> References: <20230513220418.19357-1-kirill.shutemov@linux.intel.com> <20230513220418.19357-7-kirill.shutemov@linux.intel.com> <6fe42f66-819c-f2c8-176b-759c1c5a9cf5@intel.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, May 16, 2023 at 01:03:32PM -0700, Dave Hansen wrote: > On 5/16/23 11:35, Ard Biesheuvel wrote: > >>> Does this mean that the kernel maps memory before accepting it? As > >>> otherwise, I would assume that such an access would page fault inside > >>> the guest before triggering an exception related to the unaccepted > >>> state. > >> Yes, the kernel maps memory before accepting it (modulo things like > >> DEBUG_PAGEALLOC). > >> > > OK, and so the architecture stipulates that prefetching or other > > speculative accesses must never deliver exceptions to the host > > regarding such ranges? > > I don't know of anywhere that this is explicitly written. It's probably > implicit _somewhere_ in the reams of VMX/TDX and base SDM docs, but heck > if I know where it is. :) It is not specific to TDX: on x86 (and all architectures with precise exceptions) exception handling is delayed until instruction retirement and will not happen if speculation turned out to be wrong. And prefetching never generates exceptions. But I failed to find right away in 5000+ pages of Intel Software Developer’s Manual. :/ -- Kiryl Shutsemau / Kirill A. Shutemov