From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D4C813A416 for ; Mon, 24 Jun 2024 11:42:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719229330; cv=none; b=F0hooIL2iDnxcKf4tIGj3EoS6BF0lNVZvWx0n2ExohBBhoYsAF61p9QWDsL3WU/yWrsepNTFV0mQw0yzQ1JJC2FjQg6NNt2uzFXluUrG2/9RmUUOkWujsxJml3etm5t1np/1UudXFyuR+7wMacKmgyr5hrr9QZCzdt9ELH1aXAk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719229330; c=relaxed/simple; bh=1k07vV7KQj8ThVBwSvxTgnF1hHNqQwmPgYo9YN/leIQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tdI8M5v6Fa21I8uuZKup2BzunJ4USANXPtNDVWjgN2yDHipvx00MtdnbreEYROMRTLWjZ0l+6640VsnUPFTEfJJGzHlJZqXwrZJZxt7vLEkzMoSt5c3UbgnMbyTXoZl9IqVUxHjzDh3RLaWnfbMhuuxws4GnO8/1V+gc4QQmrdU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.helo=mgamail.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=W5hvd7CU; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.helo=mgamail.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="W5hvd7CU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719229329; x=1750765329; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1k07vV7KQj8ThVBwSvxTgnF1hHNqQwmPgYo9YN/leIQ=; b=W5hvd7CU7TITypAGpZgoEtwusDNA5lfM3MyM8xg0PrGkskkwSGUwtVeS uscMEN8Op1L7FcxEsPT10byMri79gMrSsNTlarw5dgfAkl7Js48cO8LNW 7181TOmKEIuoxdo0VFf2Bq+J37UorBksJa/5eXny104/j9+vJiThkFkTe E0yiBjrdMG3au/bALwIm2JxkpthaBFTcTHCSxGRoDI3OdeNpeIWHxLEVV qsgDArR2M8R4vJ1a86nJWDooZ8jnhnDAKAaCRoAQPVsQZyu36zSuJJFHm vjxlhiF2RPYMC9GPXIpUya5zrkNaJB63qK/q91SgWjMGennn9feYDr35x A==; X-CSE-ConnectionGUID: VoIo6zofQBuatInHDV+74g== X-CSE-MsgGUID: 4Tg+JW6CTDKuMe7Bz+VVCw== X-IronPort-AV: E=McAfee;i="6700,10204,11112"; a="16019280" X-IronPort-AV: E=Sophos;i="6.08,261,1712646000"; d="scan'208";a="16019280" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2024 04:42:09 -0700 X-CSE-ConnectionGUID: /F/5PyK7SMuh/2l3vBI5kg== X-CSE-MsgGUID: ABVQ0nHMTE66tqjXCvEV9Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,261,1712646000"; d="scan'208";a="43713921" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa006.jf.intel.com with ESMTP; 24 Jun 2024 04:42:07 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id 7B08341D; Mon, 24 Jun 2024 14:42:05 +0300 (EEST) From: "Kirill A. Shutemov" To: "Kirill A. Shutemov" , Dave Hansen , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" Cc: linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCHv5 4/4] x86/tdx: Enable CPU topology enumeration Date: Mon, 24 Jun 2024 14:41:49 +0300 Message-ID: <20240624114149.377492-5-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240624114149.377492-1-kirill.shutemov@linux.intel.com> References: <20240624114149.377492-1-kirill.shutemov@linux.intel.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit TDX 1.0 defines baseline behaviour of TDX guest platform. In TDX 1.0 generates a #VE when accessing topology-related CPUID leafs (0xB and 0x1F) and the X2APIC_APICID MSR. The kernel returns all zeros on CPUID topology. In practice, this means that the kernel can only boot with a plain topology. Any complications will cause problems. The ENUM_TOPOLOGY feature allows the VMM to provide topology information to the guest. Enabling the feature eliminates topology-related #VEs: the TDX module virtualizes accesses to the CPUID leafs and the MSR. Enable ENUM_TOPOLOGY if it is available. Signed-off-by: Kirill A. Shutemov --- arch/x86/coco/tdx/tdx.c | 27 +++++++++++++++++++++++++++ arch/x86/include/asm/shared/tdx.h | 2 ++ 2 files changed, 29 insertions(+) diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index ba3103877b21..f6e48119d6fd 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -249,6 +249,32 @@ static void disable_sept_ve(u64 td_attr) return; } +/* + * TDX 1.0 generates a #VE when accessing topology-related CPUID leafs (0xB and + * 0x1F) and the X2APIC_APICID MSR. The kernel returns all zeros on CPUID #VEs. + * In practice, this means that the kernel can only boot with a plain topology. + * Any complications will cause problems. + * + * The ENUM_TOPOLOGY feature allows the VMM to provide topology information. + * Enabling the feature eliminates topology-related #VEs: the TDX module + * virtualizes accesses to the CPUID leafs and the MSR. + * + * Enable ENUM_TOPOLOGY if it is available. + */ +static void enable_cpu_topology_enumeration(void) +{ + u64 configured; + + /* Has the VMM provided a valid topology configuration? */ + tdg_vm_rd(TDCS_TOPOLOGY_ENUM_CONFIGURED, &configured); + if (!configured) { + pr_err("VMM did not configure X2APIC_IDs properly\n"); + return; + } + + tdg_vm_wr(TDCS_TD_CTLS, TD_CTLS_ENUM_TOPOLOGY, TD_CTLS_ENUM_TOPOLOGY); +} + static void tdx_setup(u64 *cc_mask) { struct tdx_module_args args = {}; @@ -280,6 +306,7 @@ static void tdx_setup(u64 *cc_mask) tdg_vm_wr(TDCS_NOTIFY_ENABLES, 0, -1ULL); disable_sept_ve(td_attr); + enable_cpu_topology_enumeration(); } /* diff --git a/arch/x86/include/asm/shared/tdx.h b/arch/x86/include/asm/shared/tdx.h index fecb2a6e864b..89f7fcade8ae 100644 --- a/arch/x86/include/asm/shared/tdx.h +++ b/arch/x86/include/asm/shared/tdx.h @@ -23,12 +23,14 @@ #define TDCS_CONFIG_FLAGS 0x1110000300000016 #define TDCS_TD_CTLS 0x1110000300000017 #define TDCS_NOTIFY_ENABLES 0x9100000000000010 +#define TDCS_TOPOLOGY_ENUM_CONFIGURED 0x9100000000000019 /* TDCS_CONFIG_FLAGS bits */ #define TDCS_CONFIG_FLEXIBLE_PENDING_VE BIT_ULL(1) /* TDCS_TD_CTLS bits */ #define TD_CTLS_PENDING_VE_DISABLE BIT_ULL(0) +#define TD_CTLS_ENUM_TOPOLOGY BIT_ULL(1) /* TDX hypercall Leaf IDs */ #define TDVMCALL_MAP_GPA 0x10001 -- 2.43.0