From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 58B331F4CBE for ; Thu, 24 Apr 2025 20:12:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745525580; cv=none; b=Jsd21hKtofkOdzJfNJ8f+OzrXS7YkRanqcQZ6uD7FNvgPO2OAhlYDJ0Hqt4QY9djQV0Os5b4DOaQ4bS/1XkL7dky5WLUiZgKCCKHjxl0RAjRT19qnJeIipz8oMmELpLbUkbRxYg8EQZgzURtGi1vHii0aLjYnaeRm65VBcLF4Us= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745525580; c=relaxed/simple; bh=xExtdz8+1dTYOoMu37+wPVOWjeqkoibsd4KQLAI0io0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BdgrKUbahGLJQaFQClLszPOkol73jWRrVEvWtGmCjQQbR8OuWpBh7mpoWFLGhyrtaOsGgdZIe0Qr1A7zQzfSxUmi7i9DVGGV56Y08GE00anuJOblJFK6RNJiF5DuTf0+4aIquAwHeRXq43Ui4ba8xfSmol7KKidTaeAGR27k/CM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LPxf3zMW; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LPxf3zMW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1745525576; x=1777061576; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=xExtdz8+1dTYOoMu37+wPVOWjeqkoibsd4KQLAI0io0=; b=LPxf3zMWmKRG6DzpoF5pWBOgDvDn9/OPl2D0Tp16Y9aNWuZAoEXrKXcy 30oMbtead+uMCKn9hpskqqpZ4fL2pTjlFHY6CQEY/kH1wk8cN/HrkPpMr EIDVxbRLjZQOxHFFxuVwDT1BuPO1h+cvfURpNKnJm5dRSjx/y54OoDJ7Y NPHoYlPvOFLYYJvMYwPp8GUAE85WAHFbJATSZaISd9K+rSwTYcdndJ6o+ cWgXImS4M47qZZBJkw2ZFNZLJKCnggblpYyv/4JeOByuzU5OA6DNe2MHl Cx2NR3aJnDCm0lj+h1JCW+4wiZbgCPWum37Pfz5nZPkoQ1WKqsHeZ5L/E A==; X-CSE-ConnectionGUID: hzdHl3vVSR2NI7O48dx34g== X-CSE-MsgGUID: wxiFNAQeTPqWvM+fnBikXw== X-IronPort-AV: E=McAfee;i="6700,10204,11413"; a="50986700" X-IronPort-AV: E=Sophos;i="6.15,237,1739865600"; d="scan'208";a="50986700" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2025 13:12:56 -0700 X-CSE-ConnectionGUID: KSVPIDBTTi+ZjV0/UwEJiw== X-CSE-MsgGUID: s0qMXMrNRsWXQc4ydFz1Zg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,237,1739865600"; d="scan'208";a="155945368" Received: from ajatsiv-mobl.amr.corp.intel.com (HELO bxing-mobl1.clients.intel.com) ([10.246.112.111]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2025 13:12:57 -0700 From: Cedric Xing Date: Thu, 24 Apr 2025 15:12:26 -0500 Subject: [PATCH v5 2/5] tsm-mr: Add tsm-mr sample code Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20250424-tdx-rtmr-v5-2-4fe28ddf85d4@intel.com> References: <20250424-tdx-rtmr-v5-0-4fe28ddf85d4@intel.com> In-Reply-To: <20250424-tdx-rtmr-v5-0-4fe28ddf85d4@intel.com> To: Dan Williams , "Kirill A. Shutemov" , Dave Hansen , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" Cc: linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, Dionna Amalie Glaze , Guorui Yu , James Bottomley , Dan Middleton , Mikko Ylinen , Sathyanarayanan Kuppuswamy , Cedric Xing X-Mailer: b4 0.13.0 This sample kernel module demonstrates how to make MRs accessible to user mode through the tsm-mr library. Once loaded, this module registers a `miscdevice` that host a set of emulated measurement registers as shown in the directory tree below. /sys/class/misc/tsm_mr_sample └── mr ├── config_mr ├── report_digest:sha512 ├── rtmr0:sha256 ├── rtmr1:sha384 ├── rtmr_crypto_agile:sha256 ├── rtmr_crypto_agile:sha384 └── static_mr:sha384 Among the MRs in this example: - `config_mr` demonstrates a hashless MR, like MRCONFIGID in Intel TDX or HOSTDATA in AMD SEV. - `static_mr` demonstrates a static MR. The suffix `:sha384` indicates its value is a sha384 digest. - `rtmr0` is an RTMR with `TSM_MR_F_WRITABLE` **cleared**, preventing direct extensions; as a result, the attribute `rtmr0:sha256` is read-only. - `rtmr1` is an RTMR with `TSM_MR_F_WRITABLE` **set**, permitting direct extensions; thus, the attribute `rtmr1:sha384` is writable. - `rtmr_crypto_agile` demonstrates a "single" MR that supports multiple hash algorithms. Each supported algorithm has a corresponding digest, usually referred to as a "bank" in TCG terminology. In this specific sample, the 2 banks are aliased to `rtmr0` and `rtmr1`, respectively. - `report_digest` contains the digest of the internal report structure living in this sample module's memory. It is to demonstrate the use of the `TSM_MR_F_LIVE` flag. Its value changes each time an RTMR is extended. Signed-off-by: Cedric Xing --- MAINTAINERS | 1 + samples/Kconfig | 11 ++++ samples/Makefile | 1 + samples/tsm-mr/Makefile | 2 + samples/tsm-mr/tsm_mr_sample.c | 137 +++++++++++++++++++++++++++++++++++++++++ 5 files changed, 152 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 1d1426af3a68..fd5bbf78ec8b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -24618,6 +24618,7 @@ S: Maintained F: Documentation/ABI/testing/configfs-tsm F: drivers/virt/coco/tsm*.c F: include/linux/tsm*.h +F: samples/tsm/* TRUSTED SERVICES TEE DRIVER M: Balint Dobszay diff --git a/samples/Kconfig b/samples/Kconfig index 09011be2391a..6ade17cb16b4 100644 --- a/samples/Kconfig +++ b/samples/Kconfig @@ -184,6 +184,17 @@ config SAMPLE_TIMER bool "Timer sample" depends on CC_CAN_LINK && HEADERS_INSTALL +config SAMPLE_TSM_MR + tristate "TSM measurement sample" + select TSM_MEASUREMENTS + select VIRT_DRIVERS + help + Build a sample module that emulates MRs (Measurement Registers) and + exposes them to user mode applications through the TSM sysfs + interface (/sys/class/misc/tsm_mr_sample/emulated_mr/). + + The module name will be tsm-mr-sample when built as a module. + config SAMPLE_UHID bool "UHID sample" depends on CC_CAN_LINK && HEADERS_INSTALL diff --git a/samples/Makefile b/samples/Makefile index bf6e6fca5410..c95bac31851c 100644 --- a/samples/Makefile +++ b/samples/Makefile @@ -43,3 +43,4 @@ obj-$(CONFIG_SAMPLES_RUST) += rust/ obj-$(CONFIG_SAMPLE_DAMON_WSSE) += damon/ obj-$(CONFIG_SAMPLE_DAMON_PRCL) += damon/ obj-$(CONFIG_SAMPLE_HUNG_TASK) += hung_task/ +obj-$(CONFIG_SAMPLE_TSM_MR) += tsm-mr/ diff --git a/samples/tsm-mr/Makefile b/samples/tsm-mr/Makefile new file mode 100644 index 000000000000..587c3947b3a7 --- /dev/null +++ b/samples/tsm-mr/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_SAMPLE_TSM_MR) += tsm_mr_sample.o diff --git a/samples/tsm-mr/tsm_mr_sample.c b/samples/tsm-mr/tsm_mr_sample.c new file mode 100644 index 000000000000..3ee35d87d275 --- /dev/null +++ b/samples/tsm-mr/tsm_mr_sample.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2024 Intel Corporation. All rights reserved. */ + +#define DEBUG +#define pr_fmt(x) KBUILD_MODNAME ": " x + +#include +#include +#include +#include + +struct { + u8 static_mr[SHA384_DIGEST_SIZE]; + u8 config_mr[SHA512_DIGEST_SIZE]; + u8 rtmr0[SHA256_DIGEST_SIZE]; + u8 rtmr1[SHA384_DIGEST_SIZE]; + u8 report_digest[SHA512_DIGEST_SIZE]; +} sample_report = { + .static_mr = "static_mr", + .config_mr = "config_mr", + .rtmr0 = "rtmr0", + .rtmr1 = "rtmr1", +}; + +static int sample_report_refresh(const struct tsm_measurements *tm, + const struct tsm_measurement_register *mr) +{ + struct crypto_shash *tfm; + int rc; + + pr_debug("%s(%s) is called\n", __func__, mr ? mr->mr_name : ""); + + tfm = crypto_alloc_shash(hash_algo_name[HASH_ALGO_SHA512], 0, 0); + if (IS_ERR(tfm)) { + pr_err("crypto_alloc_shash failed: %ld\n", PTR_ERR(tfm)); + return PTR_ERR(tfm); + } + + rc = crypto_shash_tfm_digest(tfm, (u8 *)&sample_report, + offsetof(typeof(sample_report), + report_digest), + sample_report.report_digest); + crypto_free_shash(tfm); + if (rc) + pr_err("crypto_shash_tfm_digest failed: %d\n", rc); + return rc; +} + +static int sample_report_extend_mr(const struct tsm_measurements *tm, + const struct tsm_measurement_register *mr, + const u8 *data) +{ + SHASH_DESC_ON_STACK(desc, 0); + int rc; + + pr_debug("%s(%s) is called\n", __func__, mr->mr_name); + + desc->tfm = crypto_alloc_shash(hash_algo_name[mr->mr_hash], 0, 0); + if (IS_ERR(desc->tfm)) { + pr_err("crypto_alloc_shash failed: %ld\n", PTR_ERR(desc->tfm)); + return PTR_ERR(desc->tfm); + } + + rc = crypto_shash_init(desc); + if (!rc) + rc = crypto_shash_update(desc, mr->mr_value, mr->mr_size); + if (!rc) + rc = crypto_shash_finup(desc, data, mr->mr_size, mr->mr_value); + crypto_free_shash(desc->tfm); + if (rc) + pr_err("SHA calculation failed: %d\n", rc); + return rc; +} + +#define MR_(mr, hash) .mr_value = &sample_report.mr, TSM_MR_(mr, hash) +static const struct tsm_measurement_register sample_mrs[] = { + /* static MR, read-only */ + { MR_(static_mr, SHA384) }, + /* config MR, read-only */ + { MR_(config_mr, SHA512) | TSM_MR_F_NOHASH }, + /* RTMR, direct extension prohibited */ + { MR_(rtmr0, SHA256) | TSM_MR_F_LIVE }, + /* RTMR, direct extension allowed */ + { MR_(rtmr1, SHA384) | TSM_MR_F_RTMR }, + /* RTMR, crypto agile, alaised to rtmr0 and rtmr1, respectively */ + { .mr_value = &sample_report.rtmr0, + TSM_MR_(rtmr_crypto_agile, SHA256) | TSM_MR_F_RTMR }, + { .mr_value = &sample_report.rtmr1, + TSM_MR_(rtmr_crypto_agile, SHA384) | TSM_MR_F_RTMR }, + /* sha512 digest of the whole structure */ + { MR_(report_digest, SHA512) | TSM_MR_F_LIVE }, +}; +#undef MR_ + +static struct tsm_measurements sample_tm = { + .mrs = sample_mrs, + .nr_mrs = ARRAY_SIZE(sample_mrs), + .refresh = sample_report_refresh, + .write = sample_report_extend_mr, +}; + +static const struct attribute_group *sample_groups[] = { + NULL, + NULL, +}; + +static struct miscdevice sample_misc_dev = { + .name = KBUILD_MODNAME, + .minor = MISC_DYNAMIC_MINOR, + .groups = sample_groups, +}; + +static int __init tsm_mr_sample_init(void) +{ + int rc; + + sample_groups[0] = tsm_mr_create_attribute_group(&sample_tm); + if (IS_ERR(sample_groups[0])) + return PTR_ERR(sample_groups[0]); + + rc = misc_register(&sample_misc_dev); + if (rc) + tsm_mr_free_attribute_group(sample_groups[0]); + return rc; +} + +static void __exit tsm_mr_sample_exit(void) +{ + misc_deregister(&sample_misc_dev); + tsm_mr_free_attribute_group(sample_groups[0]); +} + +module_init(tsm_mr_sample_init); +module_exit(tsm_mr_sample_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Sample module using tsm-mr to expose emulated MRs"); -- 2.43.0