From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E95422E62CE for ; Fri, 11 Jul 2025 13:34:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752240872; cv=none; b=P1Tkd3u+yzD0QHy/txYd7SfYhgHxYrbenWowhm70VuOIkRph/2RKvvrPHK/KJvtuJAqi4QiToZt9p5RZ50QNz1H9zdXpXk/AX0h5yLlmxueiXn9y8DohPLQ31m3NHwWLr8h+pZU3I+VXlKT9cFgCnWCM07Y6QNe3a4gLEA846Dc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752240872; c=relaxed/simple; bh=x092r1fSBa4wry6ULv5QvHdrP4+so9lToB70GqLJWdY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Dpm2TO/1CSQGR5rZ5fPG8YHrJqpket3W3/Ee93dnPzBfur8i7xP0Q3v5P9GLva1iD6eBctGBbCGUzOmBzelLNABB1JDnGezpI2PlaL8dMsHmAPEoPondABrj6tkGpcEDM+4pnN88O2zTvCWdQ3VbTFjp0rxfOVdrlX16m2NS2g0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=A3FV5LkJ; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="A3FV5LkJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1752240870; x=1783776870; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=x092r1fSBa4wry6ULv5QvHdrP4+so9lToB70GqLJWdY=; b=A3FV5LkJLJSZctVgphbU8exMgQR/t9fRYSQJOFDmlc6VnmhUZrhx+LEc y3P/9TXmX9wl94lQ7xFAKv8y/AkSrbcnkZ9ps5P5Snq8wet6s6/AP1h2m swjPHickRaSTXg18AFGULXEsRKXYkE4rCrImT0rx62qZgecWt6KBZ28ue gQpbjISxGen9yKdmYgALNdoV87MRRvLH/gcsXCH+2jXSGK+y0aswfFB03 P8UT3KJ8yq7XwErkfOI8D8w7LxsUyyIcDFYxDCFACyeCzhle7l3U2b7jt lZQjPgrWCUnDKjEFJXsD3rP2gKHTIKrZBxMuXwLTTCHqTvLRmTJORUisI w==; X-CSE-ConnectionGUID: Q9KXZon9RDa0OKJ5eE87Xw== X-CSE-MsgGUID: 6V1YsS7WSEWCY5QbAQU8Qw== X-IronPort-AV: E=McAfee;i="6800,10657,11491"; a="65603413" X-IronPort-AV: E=Sophos;i="6.16,303,1744095600"; d="scan'208";a="65603413" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2025 06:34:30 -0700 X-CSE-ConnectionGUID: 83wPkaMNSOWVzz6LEjItFA== X-CSE-MsgGUID: 7q3m3/5PSkewfH07OzvUbA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,303,1744095600"; d="scan'208";a="187349234" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by fmviesa001.fm.intel.com with ESMTP; 11 Jul 2025 06:34:26 -0700 From: Xiaoyao Li To: "Kirill A. Shutemov" , Dave Hansen , Sean Christopherson , Paolo Bonzini Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, Kai Huang , binbin.wu@linux.intel.com, yan.y.zhao@intel.com, reinette.chatre@intel.com, isaku.yamahata@intel.com, adrian.hunter@intel.com, tony.lindgren@intel.com, xiaoyao.li@intel.com, rick.p.edgecombe@intel.com Subject: [PATCH v2 2/3] KVM: TDX: Remove redundant definitions of TDX_TD_ATTR_* Date: Fri, 11 Jul 2025 21:26:19 +0800 Message-ID: <20250711132620.262334-3-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250711132620.262334-1-xiaoyao.li@intel.com> References: <20250711132620.262334-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit There are definitions of TD attributes bits inside asm/shared/tdx.h as TDX_ATTR_*. Remove KVM's definitions and use the ones in asm/shared/tdx.h Reviewed-by: Kirill A. Shutemov Reviewed-by: Kai Huang Signed-off-by: Xiaoyao Li --- arch/x86/kvm/vmx/tdx.c | 4 ++-- arch/x86/kvm/vmx/tdx_arch.h | 6 ------ 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index c539c2e6109f..efb7d589b672 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -62,7 +62,7 @@ void tdh_vp_wr_failed(struct vcpu_tdx *tdx, char *uclass, char *op, u32 field, pr_err("TDH_VP_WR[%s.0x%x]%s0x%llx failed: 0x%llx\n", uclass, field, op, val, err); } -#define KVM_SUPPORTED_TD_ATTRS (TDX_TD_ATTR_SEPT_VE_DISABLE) +#define KVM_SUPPORTED_TD_ATTRS (TDX_ATTR_SEPT_VE_DISABLE) static __always_inline struct kvm_tdx *to_kvm_tdx(struct kvm *kvm) { @@ -700,7 +700,7 @@ int tdx_vcpu_create(struct kvm_vcpu *vcpu) vcpu->arch.l1_tsc_scaling_ratio = kvm_tdx->tsc_multiplier; vcpu->arch.guest_state_protected = - !(to_kvm_tdx(vcpu->kvm)->attributes & TDX_TD_ATTR_DEBUG); + !(to_kvm_tdx(vcpu->kvm)->attributes & TDX_ATTR_DEBUG); if ((kvm_tdx->xfam & XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE) vcpu->arch.xfd_no_write_intercept = true; diff --git a/arch/x86/kvm/vmx/tdx_arch.h b/arch/x86/kvm/vmx/tdx_arch.h index a30e880849e3..350143b9b145 100644 --- a/arch/x86/kvm/vmx/tdx_arch.h +++ b/arch/x86/kvm/vmx/tdx_arch.h @@ -75,12 +75,6 @@ struct tdx_cpuid_value { u32 edx; } __packed; -#define TDX_TD_ATTR_DEBUG BIT_ULL(0) -#define TDX_TD_ATTR_SEPT_VE_DISABLE BIT_ULL(28) -#define TDX_TD_ATTR_PKS BIT_ULL(30) -#define TDX_TD_ATTR_KL BIT_ULL(31) -#define TDX_TD_ATTR_PERFMON BIT_ULL(63) - #define TDX_EXT_EXIT_QUAL_TYPE_MASK GENMASK(3, 0) #define TDX_EXT_EXIT_QUAL_TYPE_PENDING_EPT_VIOLATION 6 /* -- 2.43.0