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Shutemov" , Dave Hansen , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Sean Christopherson , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Vitaly Kuznetsov , Boris Ostrovsky , xen-devel@lists.xenproject.org, Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Andy Lutomirski , Peter Zijlstra , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt Subject: [PATCH v2 00/12] x86/msr: Inline rdmsr/wrmsr instructions Date: Tue, 30 Sep 2025 09:03:44 +0200 Message-ID: <20250930070356.30695-1-jgross@suse.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-1.51 / 50.00]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCPT_COUNT_TWELVE(0.00)[33]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; MIME_TRACE(0.00)[0:+]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FREEMAIL_CC(0.00)[zytor.com,suse.com,kernel.org,linux.intel.com,linutronix.de,redhat.com,alien8.de,google.com,microsoft.com,oracle.com,lists.xenproject.org,broadcom.com,infradead.org,gmail.com]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns,suse.com:mid,suse.com:dkim]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; RCVD_VIA_SMTP_AUTH(0.00)[]; TAGGED_RCPT(0.00)[lkml]; DKIM_TRACE(0.00)[suse.com:+]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)]; FREEMAIL_ENVRCPT(0.00)[gmail.com] X-Spam-Flag: NO X-Spam-Level: X-Rspamd-Queue-Id: 9380133739 X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Rspamd-Action: no action X-Spam-Score: -1.51 When building a kernel with CONFIG_PARAVIRT_XXL the paravirt infrastructure will always use functions for reading or writing MSRs, even when running on bare metal. Switch to inline RDMSR/WRMSR instructions in this case, reducing the paravirt overhead. In order to make this less intrusive, some further reorganization of the MSR access helpers is done in the first 5 patches. The next 5 patches are converting the non-paravirt case to use direct inlining of the MSR access instructions, including the WRMSRNS instruction and the immediate variants of RDMSR and WRMSR if possible. Patch 11 removes the PV hooks for MSR accesses and implements the Xen PV cases via calls depending on X86_FEATURE_XENPV, which results in runtime patching those calls away for the non-XenPV case. Patch 12 is a final little cleanup patch. This series has been tested to work with Xen PV and on bare metal. This series is inspired by Xin Li, who used a similar approach, but (in my opinion) with some flaws. Originally I thought it should be possible to use the paravirt infrastructure, but this turned out to be rather complicated, especially for the Xen PV case in the *_safe() variants of the MSR access functions. Changes since V1: - Use Xin Li's approach for inlining - Several new patches Juergen Gross (9): coco/tdx: Rename MSR access helpers x86/sev: replace call of native_wrmsr() with native_wrmsrq() x86/kvm: Remove the KVM private read_msr() function x86/msr: minimize usage of native_*() msr access functions x86/msr: Move MSR trace calls one function level up x86/msr: Use the alternatives mechanism for WRMSR x86/msr: Use the alternatives mechanism for RDMSR x86/paravirt: Don't use pv_ops vector for MSR access functions x86/msr: Reduce number of low level MSR access helpers Xin Li (Intel) (3): x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions x86/opcode: Add immediate form MSR instructions x86/extable: Add support for immediate form MSR instructions arch/x86/coco/tdx/tdx.c | 8 +- arch/x86/hyperv/ivm.c | 2 +- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/fred.h | 2 +- arch/x86/include/asm/kvm_host.h | 10 - arch/x86/include/asm/msr.h | 409 +++++++++++++++++++------- arch/x86/include/asm/paravirt.h | 67 ----- arch/x86/include/asm/paravirt_types.h | 13 - arch/x86/include/asm/sev-internal.h | 7 +- arch/x86/kernel/cpu/scattered.c | 1 + arch/x86/kernel/kvmclock.c | 2 +- arch/x86/kernel/paravirt.c | 5 - arch/x86/kvm/svm/svm.c | 16 +- arch/x86/kvm/vmx/vmx.c | 4 +- arch/x86/lib/x86-opcode-map.txt | 5 +- arch/x86/mm/extable.c | 39 ++- arch/x86/xen/enlighten_pv.c | 24 +- arch/x86/xen/pmu.c | 5 +- tools/arch/x86/lib/x86-opcode-map.txt | 5 +- 19 files changed, 383 insertions(+), 242 deletions(-) -- 2.51.0