From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: <dan.j.williams@intel.com>
Cc: <linux-pci@vger.kernel.org>, <linux-coco@lists.linux.dev>,
<bhelgaas@google.com>, <aneesh.kumar@kernel.org>,
<yilun.xu@linux.intel.com>, <aik@amd.com>
Subject: Re: [PATCH 3/6] PCI/IDE: Initialize an ID for all IDE streams
Date: Mon, 10 Nov 2025 11:52:55 +0000 [thread overview]
Message-ID: <20251110115255.000010f3@huawei.com> (raw)
In-Reply-To: <690be315ed059_74f761007a@dwillia2-mobl4.notmuch>
> > > ---
> > > drivers/pci/pci.h | 2 +
> > > include/linux/pci-ide.h | 6 ++
> > > include/linux/pci.h | 1 +
> > > drivers/pci/ide.c | 133 ++++++++++++++++++++++++++++++++++++++++
> > > drivers/pci/remove.c | 1 +
> > > 5 files changed, 143 insertions(+)
> > >
> > > diff --git a/drivers/pci/ide.c b/drivers/pci/ide.c
> > > index d7fc741f3a26..33b3c54c62a1 100644
> > > --- a/drivers/pci/ide.c
> > > +++ b/drivers/pci/ide.c
>
> > > +}
> > > +
> > > +static bool claim_stream(struct pci_host_bridge *hb, u8 stream_id,
> > > + struct pci_dev *pdev, u8 stream_idx)
> > > +{
> > > + dev_info(&hb->dev, "Stream ID %d active at init\n", stream_id);
> > > + if (!reserve_stream_id(hb, stream_id)) {
> > > + dev_info(&hb->dev, "Failed to claim %s Stream ID %d\n",
> > > + stream_id == PCI_IDE_RESERVED_STREAM_ID ? "reserved" :
> > > + "active",
> > > + stream_id);
> >
> > Good to have a comment on why we carry on anyway.
>
> ...but we do not carry on. When claim_stream() fails pci_ide_init()
> fails. So this dev_info() is there to clue in an admin wondering why IDE
> capabilities may not be available for some devices.
Ok. Failure isn't an error as such, but stuff just doesn't get set up.
Fair enough.
> > > + if (!reserve_stream_id(hb, stream_id))
> > > + return NULL;
> > > +
> > > + *sid = (struct pci_ide_stream_id) {
> > > + .hb = hb,
> > > + .stream_id = stream_id,
> > > + };
> > > +
> > > + return sid;
> > > +}
> > > +DEFINE_FREE(free_stream_id, struct pci_ide_stream_id *,
> > > + if (_T) ida_free(&_T->hb->ide_stream_ids_ida, _T->stream_id))
> > > +
> > > /**
> > > * pci_ide_stream_register() - Prepare to activate an IDE Stream
> > > * @ide: IDE settings descriptor
> > > @@ -313,6 +427,7 @@ int pci_ide_stream_register(struct pci_ide *ide)
> > > {
> > > struct pci_dev *pdev = ide->pdev;
> > > struct pci_host_bridge *hb = pci_find_host_bridge(pdev->bus);
> > > + struct pci_ide_stream_id __sid;
> > > u8 ep_stream, rp_stream;
> > > int rc;
> > >
> > > @@ -321,6 +436,13 @@ int pci_ide_stream_register(struct pci_ide *ide)
> > > return -ENXIO;
> > > }
> > >
> > > + struct pci_ide_stream_id *sid __free(free_stream_id) =
> > > + alloc_stream_id(hb, ide->stream_id, &__sid);
> >
> > Given the use of __sid as magic storage, I wonder if this can
> > be a CLASS with that storage wrapped up alongside a flag
> > we clear to make the destructor a no op. Similar to what happens for
> > spin_lock_irqsave where we stash flags etc via __DEFINE_UNLOCK_GUARD()
> >
> > Would need something a little more complex than current retain_and_null_ptr()
> > as it would need to set _T.ptr = NULL rather that _T = NULL.
>
> Interesting. It is rare to have this kind of request model in core code.
> Most of the "discover the platform published resource + request it"
> happens in driver probe contexts and devm cleanup is available for that
> (e.g. devm_request_mem_region()). If we can find more users for such a
> scope-based-cleanup model I would cheer on the person that wanted to
> take that on.
>
> Otherwise the "magic storage" approach is also taken with:
>
> struct stream_index __stream[PCI_IDE_HB + 1];
> ...
> alloc_stream_index(..., &__stream[...]);
>
Agreed. Potentially this is something for another day.
Jonathan
next prev parent reply other threads:[~2025-11-10 11:52 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-05 4:00 [PATCH 0/6] PCI/TSM: Finalize "Link" TSM infrastructure Dan Williams
2025-11-05 4:00 ` [PATCH 1/6] resource: Introduce resource_assigned() for discerning active resources Dan Williams
2025-11-05 9:17 ` Jonathan Cameron
2025-11-05 21:57 ` dan.j.williams
2025-11-05 4:00 ` [PATCH 2/6] PCI/IDE: Add Address Association Register setup for downstream MMIO Dan Williams
2025-11-05 9:58 ` Jonathan Cameron
2025-11-05 23:04 ` dan.j.williams
2025-11-10 11:49 ` Jonathan Cameron
2025-11-05 4:00 ` [PATCH 3/6] PCI/IDE: Initialize an ID for all IDE streams Dan Williams
2025-11-05 15:27 ` Jonathan Cameron
2025-11-05 23:51 ` dan.j.williams
2025-11-10 11:52 ` Jonathan Cameron [this message]
2025-11-05 4:00 ` [PATCH 4/6] PCI/TSM: Add pci_tsm_bind() helper for instantiating TDIs Dan Williams
2025-11-05 4:59 ` Aneesh Kumar K.V
2025-11-05 21:49 ` dan.j.williams
2025-11-05 15:31 ` Jonathan Cameron
2025-11-06 0:11 ` dan.j.williams
2025-11-05 4:00 ` [PATCH 5/6] PCI/TSM: Add pci_tsm_guest_req() for managing TDIs Dan Williams
2025-11-05 15:38 ` Jonathan Cameron
2025-11-06 0:13 ` dan.j.williams
2025-11-05 4:00 ` [PATCH 6/6] PCI/TSM: Add 'dsm' and 'bound' attributes for dependent functions Dan Williams
2025-11-05 17:53 ` Jonathan Cameron
2025-11-13 12:10 ` Jonathan Cameron
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