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Peter Anvin" Subject: [PATCH v4 04/24] x86/virt/seamldr: Introduce a wrapper for P-SEAMLDR SEAMCALLs Date: Thu, 12 Feb 2026 06:35:07 -0800 Message-ID: <20260212143606.534586-5-chao.gao@intel.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260212143606.534586-1-chao.gao@intel.com> References: <20260212143606.534586-1-chao.gao@intel.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The TDX architecture uses the "SEAMCALL" instruction to communicate with SEAM mode software. Right now, the only SEAM mode software that the kernel communicates with is the TDX module. But, there is actually another component that runs in SEAM mode but it is separate from the TDX module: the persistent SEAM loader or "P-SEAMLDR". Right now, the only component that communicates with it is the BIOS which loads the TDX module itself at boot. But, to support updating the TDX module, the kernel now needs to be able to talk to it. P-SEAMLDR SEAMCALLs differ from TDX Module SEAMCALLs in areas such as concurrency requirements. Add a P-SEAMLDR wrapper to handle these differences and prepare for implementing concrete functions. Note that unlike P-SEAMLDR, there is also a non-persistent SEAM loader ("NP-SEAMLDR"). This is an authenticated code module (ACM) that is not callable at runtime. Only BIOS launches it to load P-SEAMLDR at boot; the kernel does not interact with it. For details of P-SEAMLDR SEAMCALLs, see Intel® Trust Domain CPU Architectural Extensions, Revision 343754-002, Chapter 2.3 "INSTRUCTION SET REFERENCE". Signed-off-by: Chao Gao Tested-by: Farrah Chen Link: https://cdrdv2.intel.com/v1/dl/getContent/733582 # [1] --- v4: - Give more background about P-SEAMLDR in changelog [Dave] - Don't handle P-SEAMLDR's "no_entropy" error [Dave] - Assume current VMCS is preserved across P-SEAMLDR calls [Dave] - I'm not adding Reviewed-by tags as the code has changed significantly. v2: - don't create a new, inferior framework to save/restore VMCS - use human-friendly language, just "current VMCS" rather than SDM term "current-VMCS pointer" - don't mix guard() with goto --- arch/x86/virt/vmx/tdx/Makefile | 2 +- arch/x86/virt/vmx/tdx/seamldr.c | 27 +++++++++++++++++++++++++++ 2 files changed, 28 insertions(+), 1 deletion(-) create mode 100644 arch/x86/virt/vmx/tdx/seamldr.c diff --git a/arch/x86/virt/vmx/tdx/Makefile b/arch/x86/virt/vmx/tdx/Makefile index 90da47eb85ee..d1dbc5cc5697 100644 --- a/arch/x86/virt/vmx/tdx/Makefile +++ b/arch/x86/virt/vmx/tdx/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += seamcall.o tdx.o +obj-y += seamcall.o seamldr.o tdx.o diff --git a/arch/x86/virt/vmx/tdx/seamldr.c b/arch/x86/virt/vmx/tdx/seamldr.c new file mode 100644 index 000000000000..fb59b3e2aa37 --- /dev/null +++ b/arch/x86/virt/vmx/tdx/seamldr.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * P-SEAMLDR support for TDX Module management features like runtime updates + * + * Copyright (C) 2025 Intel Corporation + */ +#define pr_fmt(fmt) "seamldr: " fmt + +#include + +#include "seamcall_internal.h" + +/* + * Serialize P-SEAMLDR calls since the hardware only allows a single CPU to + * interact with P-SEAMLDR simultaneously. + */ +static DEFINE_RAW_SPINLOCK(seamldr_lock); + +static __maybe_unused int seamldr_call(u64 fn, struct tdx_module_args *args) +{ + /* + * Serialize P-SEAMLDR calls and disable interrupts as the calls + * can be made from IRQ context. + */ + guard(raw_spinlock_irqsave)(&seamldr_lock); + return seamcall_prerr(fn, args); +} -- 2.47.3