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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: SrZO20Yl46bksi5GUuFnOtBcyI1oC8Asrmv4PJEyuZl4n+dH/MHjxVPt0MvOUC9wg93z1snlOpS8aAR67OMMm5iUdl1020AFR7uJvFz/hbj3Zqw8fRbCeX+kh31FYwVLLvx+b7PhQa6N5FcVMUF9qgP1wmHfZskVf45lZ9GsdSC/EF5DVHiLhWVbJCc92ZeKPWhlGYUfB8T2amVQNxnjfBKCiV/RiR+GEtWxbA8G+hZF/6J56iF655Rjdduih6SJyHP1rXnqOfli7xVDxoq1bkotnhnvwKM+PP8xnKorux/MASnfibplF6JJszNHwBV5bDDWz4AuwBG8RrkQj/N9PNTjwsW8W1NtsY+VYZhSTjrPzyrwJ7jvddKbObX+Nm5swTiv9zFaNhbviCeI1u7IAJll4rxtI8o71E9XW5YfpyS5cDEmnLDKTWpMK4ofhT4x X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Mar 2026 13:06:48.3161 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 23762fcb-7394-4919-d9c8-08de7f6f0dd8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004688.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PPFDC28CEE69 This is to prepare to allow legacy IBRS toggling on AMD systems, where the BTB Isolation SEV-SNP feature can use it to optimize the quick VM exit to re-entry path. There is no reason this wasn't allowed in the first place, therefore adding the cc: stable and Fixes: tags. Fixes: 7c693f54c873 ("x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS") Reported-by: Tom Lendacky Cc: Pawan Gupta Cc: Borislav Petkov (AMD) Cc: stable@kernel.org Signed-off-by: Kim Phillips --- v2: No changes v1: https://lore.kernel.org/kvm/20260224180157.725159-3-kim.phillips@amd.com/ arch/x86/kernel/cpu/bugs.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 957e0df38d90..c910da561044 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -2152,11 +2152,6 @@ static void __init spectre_v2_select_mitigation(void) spectre_v2_cmd = SPECTRE_V2_CMD_AUTO; } - if (spectre_v2_cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) { - pr_err("IBRS selected but not Intel CPU. Switching to AUTO select\n"); - spectre_v2_cmd = SPECTRE_V2_CMD_AUTO; - } - if (spectre_v2_cmd == SPECTRE_V2_CMD_IBRS && !boot_cpu_has(X86_FEATURE_IBRS)) { pr_err("IBRS selected but CPU doesn't have IBRS. Switching to AUTO select\n"); spectre_v2_cmd = SPECTRE_V2_CMD_AUTO; @@ -2251,7 +2246,7 @@ static void __init spectre_v2_apply_mitigation(void) pr_err(SPECTRE_V2_EIBRS_EBPF_MSG); if (spectre_v2_in_ibrs_mode(spectre_v2_enabled)) { - if (boot_cpu_has(X86_FEATURE_AUTOIBRS)) { + if (boot_cpu_has(X86_FEATURE_AUTOIBRS) && spectre_v2_enabled != SPECTRE_V2_IBRS) { msr_set_bit(MSR_EFER, _EFER_AUTOIBRS); } else { x86_spec_ctrl_base |= SPEC_CTRL_IBRS; -- 2.43.0